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Commit 1bc277f7 authored by Dmitry Kravkov's avatar Dmitry Kravkov Committed by David S. Miller
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bnx2x: add RSS capability for GRE traffic 



The patch drives FW to perform RSS for GRE traffic,
based on inner headers.

Signed-off-by: default avatarDmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a848ade4

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h

+3 −0
Original line number Diff line number Diff line
@@ -973,6 +973,9 @@ static inline int bnx2x_func_start(struct bnx2x *bp) 
	else /* CHIP_IS_E1X */

		start_params->network_cos_mode = FW_WRR;



	start_params->gre_tunnel_mode = IPGRE_TUNNEL;

	start_params->gre_tunnel_rss = GRE_INNER_HEADERS_RSS;



	return bnx2x_func_state_change(bp, &func_params);

}

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

+12 −11
Original line number Diff line number Diff line
@@ -5683,9 +5683,10 @@ static inline int bnx2x_func_send_start(struct bnx2x *bp, 
	rdata->sd_vlan_tag	= cpu_to_le16(start_params->sd_vlan_tag);

	rdata->path_id		= BP_PATH(bp);

	rdata->network_cos_mode	= start_params->network_cos_mode;

	rdata->gre_tunnel_mode	= start_params->gre_tunnel_mode;

	rdata->gre_tunnel_rss	= start_params->gre_tunnel_rss;



	/*

	 *  No need for an explicit memory barrier here as long we would

	/* No need for an explicit memory barrier here as long we would

	 * need to ensure the ordering of writing to the SPQ element

	 * and updating of the SPQ producer which involves a memory

	 * read and we will have to put a full memory barrier there

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h

+9 −0
Original line number Diff line number Diff line
@@ -1123,6 +1123,15 @@ struct bnx2x_func_start_params { 


	/* Function cos mode */

	u8 network_cos_mode;



	/* NVGRE classification enablement */

	u8 nvgre_clss_en;



	/* NO_GRE_TUNNEL/NVGRE_TUNNEL/L2GRE_TUNNEL/IPGRE_TUNNEL */

	u8 gre_tunnel_mode;



	/* GRE_OUTER_HEADERS_RSS/GRE_INNER_HEADERS_RSS/NVGRE_KEY_ENTROPY_RSS */

	u8 gre_tunnel_rss;

};



struct bnx2x_func_switch_update_params {