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Commit 1b372578 authored by Huazhong Tan's avatar Huazhong Tan Committed by David S. Miller
Browse files

net: hns3: Modify the order of initializing command queue register 



According to hardware's description, the head pointer register should
be written before the tail pointer register while doing command queue
initialization.

Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent aea06eb2

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c

+2 −2
Original line number Diff line number Diff line
@@ -119,8 +119,8 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring) 
		hclge_write_dev(hw, HCLGE_NIC_CSQ_DEPTH_REG,

				(ring->desc_num >> HCLGE_NIC_CMQ_DESC_NUM_S) |

				HCLGE_NIC_CMQ_ENABLE);

		hclge_write_dev(hw, HCLGE_NIC_CSQ_TAIL_REG, 0);

		hclge_write_dev(hw, HCLGE_NIC_CSQ_HEAD_REG, 0);

		hclge_write_dev(hw, HCLGE_NIC_CSQ_TAIL_REG, 0);

	} else {

		hclge_write_dev(hw, HCLGE_NIC_CRQ_BASEADDR_L_REG,

				lower_32_bits(dma));
@@ -129,8 +129,8 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring) 
		hclge_write_dev(hw, HCLGE_NIC_CRQ_DEPTH_REG,

				(ring->desc_num >> HCLGE_NIC_CMQ_DESC_NUM_S) |

				HCLGE_NIC_CMQ_ENABLE);

		hclge_write_dev(hw, HCLGE_NIC_CRQ_TAIL_REG, 0);

		hclge_write_dev(hw, HCLGE_NIC_CRQ_HEAD_REG, 0);

		hclge_write_dev(hw, HCLGE_NIC_CRQ_TAIL_REG, 0);

	}

}