Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1b2b01a7 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-hns3-some-code-optimizations-bugfixes' 



Huazhong Tan says:

====================
net: hns3: some code optimizations & bugfixes

This patch-set includes code optimizations and bugfixes for
the HNS3 ethernet controller driver.

[patch 1/11] fixes a selftest issue when doing autoneg.

[patch 2/11 - 3-11] adds two code optimizations about VLAN issue.

[patch 4/11] restores the MAC autoneg state after reset.

[patch 5/11 - 8/11] adds some code optimizations and bugfixes about
HW errors handling.

[patch 9/11 - 11/11] fixes some issues related to driver loading and
unloading.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 2f8776f0 bcf643c5

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+3 −1
Original line number Diff line number Diff line
@@ -213,7 +213,6 @@ struct hnae3_ae_dev { 
	const struct hnae3_ae_ops *ops;

	struct list_head node;

	u32 flag;

	u8 override_pci_need_reset; /* fix to stop multiple reset happening */

	unsigned long hw_err_reset_req;

	enum hnae3_reset_type reset_type;

	void *priv;
@@ -264,6 +263,8 @@ struct hnae3_ae_dev { 
 *   get auto autonegotiation of pause frame use

 * restart_autoneg()

 *   restart autonegotiation

 * halt_autoneg()

 *   halt/resume autonegotiation when autonegotiation on

 * get_coalesce_usecs()

 *   get usecs to delay a TX interrupt after a packet is sent

 * get_rx_max_coalesced_frames()
@@ -383,6 +384,7 @@ struct hnae3_ae_ops { 
	int (*set_autoneg)(struct hnae3_handle *handle, bool enable);

	int (*get_autoneg)(struct hnae3_handle *handle);

	int (*restart_autoneg)(struct hnae3_handle *handle);

	int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);



	void (*get_coalesce_usecs)(struct hnae3_handle *handle,

				   u32 *tx_usecs, u32 *rx_usecs);

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+1 −1
Original line number Diff line number Diff line
@@ -1950,7 +1950,7 @@ static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev) 
	ops = ae_dev->ops;

	/* request the reset */

	if (ops->reset_event) {

		if (!ae_dev->override_pci_need_reset) {

		if (ae_dev->hw_err_reset_req) {

			reset_type = ops->get_reset_level(ae_dev,

						&ae_dev->hw_err_reset_req);

			ops->set_default_reset_request(ae_dev, reset_type);

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+10 −0
Original line number Diff line number Diff line
@@ -336,6 +336,13 @@ static void hns3_self_test(struct net_device *ndev, 
		h->ae_algo->ops->enable_vlan_filter(h, false);

#endif



	/* Tell firmware to stop mac autoneg before loopback test start,

	 * otherwise loopback test may be failed when the port is still

	 * negotiating.

	 */

	if (h->ae_algo->ops->halt_autoneg)

		h->ae_algo->ops->halt_autoneg(h, true);



	set_bit(HNS3_NIC_STATE_TESTING, &priv->state);



	for (i = 0; i < HNS3_SELF_TEST_TYPE_NUM; i++) {
@@ -358,6 +365,9 @@ static void hns3_self_test(struct net_device *ndev, 


	clear_bit(HNS3_NIC_STATE_TESTING, &priv->state);



	if (h->ae_algo->ops->halt_autoneg)

		h->ae_algo->ops->halt_autoneg(h, false);



#if IS_ENABLED(CONFIG_VLAN_8021Q)

	if (dis_vlan_filter)

		h->ae_algo->ops->enable_vlan_filter(h, true);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

+68 −49
Original line number Diff line number Diff line
@@ -1060,6 +1060,52 @@ static int hclge_config_ssu_hw_err_int(struct hclge_dev *hdev, bool en) 
	return ret;

}



/* hclge_query_bd_num: query number of buffer descriptors

 * @hdev: pointer to struct hclge_dev

 * @is_ras: true for ras, false for msix

 * @mpf_bd_num: number of main PF interrupt buffer descriptors

 * @pf_bd_num: number of not main PF interrupt buffer descriptors

 *

 * This function querys number of mpf and pf buffer descriptors.

 */

static int hclge_query_bd_num(struct hclge_dev *hdev, bool is_ras,

			      int *mpf_bd_num, int *pf_bd_num)

{

	struct device *dev = &hdev->pdev->dev;

	u32 mpf_min_bd_num, pf_min_bd_num;

	enum hclge_opcode_type opcode;

	struct hclge_desc desc_bd;

	int ret;



	if (is_ras) {

		opcode = HCLGE_QUERY_RAS_INT_STS_BD_NUM;

		mpf_min_bd_num = HCLGE_MPF_RAS_INT_MIN_BD_NUM;

		pf_min_bd_num = HCLGE_PF_RAS_INT_MIN_BD_NUM;

	} else {

		opcode = HCLGE_QUERY_MSIX_INT_STS_BD_NUM;

		mpf_min_bd_num = HCLGE_MPF_MSIX_INT_MIN_BD_NUM;

		pf_min_bd_num = HCLGE_PF_MSIX_INT_MIN_BD_NUM;

	}



	hclge_cmd_setup_basic_desc(&desc_bd, opcode, true);

	ret = hclge_cmd_send(&hdev->hw, &desc_bd, 1);

	if (ret) {

		dev_err(dev, "fail(%d) to query msix int status bd num\n",

			ret);

		return ret;

	}



	*mpf_bd_num = le32_to_cpu(desc_bd.data[0]);

	*pf_bd_num = le32_to_cpu(desc_bd.data[1]);

	if (*mpf_bd_num < mpf_min_bd_num || *pf_bd_num < pf_min_bd_num) {

		dev_err(dev, "Invalid bd num: mpf(%d), pf(%d)\n",

			*mpf_bd_num, *pf_bd_num);

		return -EINVAL;

	}



	return 0;

}



/* hclge_handle_mpf_ras_error: handle all main PF RAS errors

 * @hdev: pointer to struct hclge_dev

 * @desc: descriptor for describing the command
@@ -1291,24 +1337,16 @@ static int hclge_handle_pf_ras_error(struct hclge_dev *hdev, 


static int hclge_handle_all_ras_errors(struct hclge_dev *hdev)

{

	struct device *dev = &hdev->pdev->dev;

	u32 mpf_bd_num, pf_bd_num, bd_num;

	struct hclge_desc desc_bd;

	struct hclge_desc *desc;

	int ret;



	/* query the number of registers in the RAS int status */

	hclge_cmd_setup_basic_desc(&desc_bd, HCLGE_QUERY_RAS_INT_STS_BD_NUM,

				   true);

	ret = hclge_cmd_send(&hdev->hw, &desc_bd, 1);

	if (ret) {

		dev_err(dev, "fail(%d) to query ras int status bd num\n", ret);

	ret = hclge_query_bd_num(hdev, true, &mpf_bd_num, &pf_bd_num);

	if (ret)

		return ret;

	}

	mpf_bd_num = le32_to_cpu(desc_bd.data[0]);

	pf_bd_num = le32_to_cpu(desc_bd.data[1]);

	bd_num = max_t(u32, mpf_bd_num, pf_bd_num);



	bd_num = max_t(u32, mpf_bd_num, pf_bd_num);

	desc = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL);

	if (!desc)

		return -ENOMEM;
@@ -1606,6 +1644,8 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) 
	if (status & HCLGE_RAS_REG_NFE_MASK ||

	    status & HCLGE_RAS_REG_ROCEE_ERR_MASK)

		ae_dev->hw_err_reset_req = 0;

	else

		goto out;



	/* Handling Non-fatal HNS RAS errors */

	if (status & HCLGE_RAS_REG_NFE_MASK) {
@@ -1613,27 +1653,22 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) 
			 "HNS Non-Fatal RAS error(status=0x%x) identified\n",

			 status);

		hclge_handle_all_ras_errors(hdev);

	} else {

		if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) ||

		    hdev->pdev->revision < 0x21) {

			ae_dev->override_pci_need_reset = 1;

			return PCI_ERS_RESULT_RECOVERED;

		}

	}



	if (status & HCLGE_RAS_REG_ROCEE_ERR_MASK) {

		dev_warn(dev, "ROCEE uncorrected RAS error identified\n");

	/* Handling Non-fatal Rocee RAS errors */

	if (hdev->pdev->revision >= 0x21 &&

	    status & HCLGE_RAS_REG_ROCEE_ERR_MASK) {

		dev_warn(dev, "ROCEE Non-Fatal RAS error identified\n");

		hclge_handle_rocee_ras_error(ae_dev);

	}



	if ((status & HCLGE_RAS_REG_NFE_MASK ||

	     status & HCLGE_RAS_REG_ROCEE_ERR_MASK) &&

	     ae_dev->hw_err_reset_req) {

		ae_dev->override_pci_need_reset = 0;

	if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state))

		goto out;



	if (ae_dev->hw_err_reset_req)

		return PCI_ERS_RESULT_NEED_RESET;

	}

	ae_dev->override_pci_need_reset = 1;



out:

	return PCI_ERS_RESULT_RECOVERED;

}
@@ -1847,28 +1882,21 @@ static int hclge_handle_all_hw_msix_error(struct hclge_dev *hdev, 
	struct hclge_mac_tnl_stats mac_tnl_stats;

	struct device *dev = &hdev->pdev->dev;

	u32 mpf_bd_num, pf_bd_num, bd_num;

	struct hclge_desc desc_bd;

	struct hclge_desc *desc;

	u32 status;

	int ret;



	/* query the number of bds for the MSIx int status */

	hclge_cmd_setup_basic_desc(&desc_bd, HCLGE_QUERY_MSIX_INT_STS_BD_NUM,

				   true);

	ret = hclge_cmd_send(&hdev->hw, &desc_bd, 1);

	if (ret) {

		dev_err(dev, "fail(%d) to query msix int status bd num\n",

			ret);

		return ret;

	}

	ret = hclge_query_bd_num(hdev, false, &mpf_bd_num, &pf_bd_num);

	if (ret)

		goto out;



	mpf_bd_num = le32_to_cpu(desc_bd.data[0]);

	pf_bd_num = le32_to_cpu(desc_bd.data[1]);

	bd_num = max_t(u32, mpf_bd_num, pf_bd_num);



	desc = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL);

	if (!desc)

	if (!desc) {

		ret = -ENOMEM;

		goto out;

	}



	ret = hclge_handle_mpf_msix_error(hdev, desc, mpf_bd_num,

					  reset_requests);
@@ -1931,7 +1959,6 @@ void hclge_handle_all_hns_hw_errors(struct hnae3_ae_dev *ae_dev) 
	struct hclge_dev *hdev = ae_dev->priv;

	struct device *dev = &hdev->pdev->dev;

	u32 mpf_bd_num, pf_bd_num, bd_num;

	struct hclge_desc desc_bd;

	struct hclge_desc *desc;

	u32 status;

	int ret;
@@ -1940,19 +1967,11 @@ void hclge_handle_all_hns_hw_errors(struct hnae3_ae_dev *ae_dev) 
	status = hclge_read_dev(&hdev->hw, HCLGE_RAS_PF_OTHER_INT_STS_REG);



	/* query the number of bds for the MSIx int status */

	hclge_cmd_setup_basic_desc(&desc_bd, HCLGE_QUERY_MSIX_INT_STS_BD_NUM,

				   true);

	ret = hclge_cmd_send(&hdev->hw, &desc_bd, 1);

	if (ret) {

		dev_err(dev, "fail(%d) to query msix int status bd num\n",

			ret);

	ret = hclge_query_bd_num(hdev, false, &mpf_bd_num, &pf_bd_num);

	if (ret)

		return;

	}



	mpf_bd_num = le32_to_cpu(desc_bd.data[0]);

	pf_bd_num = le32_to_cpu(desc_bd.data[1]);

	bd_num = max_t(u32, mpf_bd_num, pf_bd_num);



	desc = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL);

	if (!desc)

		return;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h

+5 −0
Original line number Diff line number Diff line
@@ -6,6 +6,11 @@ 


#include "hclge_main.h"



#define HCLGE_MPF_RAS_INT_MIN_BD_NUM	10

#define HCLGE_PF_RAS_INT_MIN_BD_NUM	4

#define HCLGE_MPF_MSIX_INT_MIN_BD_NUM	10

#define HCLGE_PF_MSIX_INT_MIN_BD_NUM	4



#define HCLGE_RAS_PF_OTHER_INT_STS_REG   0x20B00

#define HCLGE_RAS_REG_NFE_MASK   0xFF00

#define HCLGE_RAS_REG_ROCEE_ERR_MASK   0x3000000