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Commit 1a63e2ce authored by Vivek Natarajan's avatar Vivek Natarajan Committed by John W. Linville
Browse files

ath9k_hw: Updates for AR9485 1.1 chipsets.

parent 8354dd3e
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+101 −11
Original line number Diff line number Diff line
@@ -28,7 +28,67 @@
 */
static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
{
	if (AR_SREV_9485(ah)) {
	if (AR_SREV_9485_11(ah)) {
		/* mac */
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
				ar9485_1_1_mac_core,
				ARRAY_SIZE(ar9485_1_1_mac_core), 2);
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
				ar9485_1_1_mac_postamble,
				ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);

		/* bb */
		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
				ARRAY_SIZE(ar9485_1_1), 2);
		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
				ar9485_1_1_baseband_core,
				ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
		INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
				ar9485_1_1_baseband_postamble,
				ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);

		/* radio */
		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
				ar9485_1_1_radio_core,
				ARRAY_SIZE(ar9485_1_1_radio_core), 2);
		INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
				ar9485_1_1_radio_postamble,
				ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);

		/* soc */
		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
				ar9485_1_1_soc_preamble,
				ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);

		/* rx/tx gain */
		INIT_INI_ARRAY(&ah->iniModesRxGain,
				ar9485_common_rx_gain_1_1,
				ARRAY_SIZE(ar9485_common_rx_gain_1_1), 2);
		INIT_INI_ARRAY(&ah->iniModesTxGain,
				ar9485_modes_lowest_ob_db_tx_gain_1_1,
				ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
				5);

		/* Load PCIE SERDES settings from INI */

		/* Awake Setting */

		INIT_INI_ARRAY(&ah->iniPcieSerdes,
				ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1,
				ARRAY_SIZE(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1),
				2);

		/* Sleep Setting */

		INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
				ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1,
				ARRAY_SIZE(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1),
				2);
	} else if (AR_SREV_9485(ah)) {
		/* mac */
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
		INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
@@ -85,8 +145,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
		/* Sleep Setting */

		INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
				ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1,
				ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_enable_L1),
				ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1,
				ARRAY_SIZE(ar9485_1_0_pcie_phy_pll_on_clkreq_disable_L1),
				2);
	} else {
		/* mac */
@@ -163,7 +223,12 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
	switch (ar9003_hw_get_tx_gain_idx(ah)) {
	case 0:
	default:
		if (AR_SREV_9485(ah))
		if (AR_SREV_9485_11(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485_modes_lowest_ob_db_tx_gain_1_1,
				       ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
				       5);
		else if (AR_SREV_9485(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_lowest_ob_db_tx_gain_1_0,
				       ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
@@ -175,10 +240,15 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
				       5);
		break;
	case 1:
		if (AR_SREV_9485(ah))
		if (AR_SREV_9485_11(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_high_ob_db_tx_gain_1_1,
				       ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
				       5);
		else if (AR_SREV_9485(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_high_ob_db_tx_gain_1_0,
				       ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
				       ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_0),
				       5);
		else
			INIT_INI_ARRAY(&ah->iniModesTxGain,
@@ -187,10 +257,15 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
				       5);
		break;
	case 2:
		if (AR_SREV_9485(ah))
		if (AR_SREV_9485_11(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_low_ob_db_tx_gain_1_1,
				       ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
				       5);
		else if (AR_SREV_9485(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_low_ob_db_tx_gain_1_0,
				       ARRAY_SIZE(ar9485Modes_lowest_ob_db_tx_gain_1_0),
				       ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_0),
				       5);
		else
			INIT_INI_ARRAY(&ah->iniModesTxGain,
@@ -199,7 +274,12 @@ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
				       5);
		break;
	case 3:
		if (AR_SREV_9485(ah))
		if (AR_SREV_9485_11(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_high_power_tx_gain_1_1,
				       ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
				       5);
		else if (AR_SREV_9485(ah))
			INIT_INI_ARRAY(&ah->iniModesTxGain,
				       ar9485Modes_high_power_tx_gain_1_0,
				       ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_0),
@@ -218,7 +298,12 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
	switch (ar9003_hw_get_rx_gain_idx(ah)) {
	case 0:
	default:
		if (AR_SREV_9485(ah))
		if (AR_SREV_9485_11(ah))
			INIT_INI_ARRAY(&ah->iniModesRxGain,
				       ar9485_common_rx_gain_1_1,
				       ARRAY_SIZE(ar9485_common_rx_gain_1_1),
				       2);
		else if (AR_SREV_9485(ah))
			INIT_INI_ARRAY(&ah->iniModesRxGain,
				       ar9485Common_rx_gain_1_0,
				       ARRAY_SIZE(ar9485Common_rx_gain_1_0),
@@ -230,7 +315,12 @@ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
				       2);
		break;
	case 1:
		if (AR_SREV_9485(ah))
		if (AR_SREV_9485_11(ah))
			INIT_INI_ARRAY(&ah->iniModesRxGain,
				       ar9485Common_wo_xlna_rx_gain_1_1,
				       ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
				       2);
		else if (AR_SREV_9485(ah))
			INIT_INI_ARRAY(&ah->iniModesRxGain,
				       ar9485Common_wo_xlna_rx_gain_1_0,
				       ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_0),
+1141 −0

File changed.

Preview size limit exceeded, changes collapsed.

+4 −0
Original line number Diff line number Diff line
@@ -789,6 +789,7 @@
#define AR_SREV_REVISION_9300_20	2 /* 2.0 and 2.1 */
#define AR_SREV_VERSION_9485		0x240
#define AR_SREV_REVISION_9485_10	0
#define AR_SREV_REVISION_9485_11        1

#define AR_SREV_5416(_ah) \
	(((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
@@ -866,6 +867,9 @@
#define AR_SREV_9485_10(_ah) \
	(AR_SREV_9485(_ah) && \
	 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_10))
#define AR_SREV_9485_11(_ah) \
	(AR_SREV_9485(_ah) && \
	 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))

#define AR_SREV_9285E_20(_ah) \
    (AR_SREV_9285_12_OR_LATER(_ah) && \