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Commit 1a057b68 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Greg Kroah-Hartman
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ARM: dts: qcom: ipq8064: Fix the PCI I/O port range 



[ Upstream commit 0b16b34e491629016109e56747ad64588074194b ]

For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses
(0x0fe00000, 0x31e00000, 0x35e00000) specified in the ranges property for
I/O region.

While at it, let's use the missing 0x prefix for the addresses.

Fixes: 93241840 ("ARM: dts: qcom: Add pcie nodes for ipq8064")
Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/


Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-17-manivannan.sadhasivam@linaro.org


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 699bf5a7

arch/arm/boot/dts/qcom-ipq8064.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -451,8 +451,8 @@ 
			#address-cells = <3>;

			#size-cells = <2>;



			ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000   /* downstream I/O */

				  0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */

			ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000   /* I/O */

				  0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */



			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi";
@@ -502,8 +502,8 @@ 
			#address-cells = <3>;

			#size-cells = <2>;



			ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000   /* downstream I/O */

				  0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */

			ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000   /* I/O */

				  0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */



			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi";
@@ -553,8 +553,8 @@ 
			#address-cells = <3>;

			#size-cells = <2>;



			ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000   /* downstream I/O */

				  0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */

			ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000   /* I/O */

				  0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */



			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi";