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Commit 19d8ccc4 authored by Alexander Couzens's avatar Alexander Couzens Committed by Boris Brezillon
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mtd: nand: davinci: set ECC algorithm explicitly for HW based ECC 



If ECC strength is 4bits/512bytes the algorithm of the ECC engine is
BCH, otherwise (1bit/512bytes) Hamming is used.

Signed-off-by: default avatarAlexander Couzens <lynxis@fe80.eu>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
parent 0b2f93dc

drivers/mtd/nand/davinci_nand.c

+3 −0
Original line number Diff line number Diff line
@@ -771,11 +771,14 @@ static int nand_davinci_probe(struct platform_device *pdev) 
			info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;

			info->chip.ecc.bytes = 10;

			info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;

			info->chip.ecc.algo = NAND_ECC_BCH;

		} else {

			/* 1bit ecc hamming */

			info->chip.ecc.calculate = nand_davinci_calculate_1bit;

			info->chip.ecc.correct = nand_davinci_correct_1bit;

			info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;

			info->chip.ecc.bytes = 3;

			info->chip.ecc.algo = NAND_ECC_HAMMING;

		}

		info->chip.ecc.size = 512;

		info->chip.ecc.strength = pdata->ecc_bits;