Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 19bb2a20 authored by Sergey Shtylyov's avatar Sergey Shtylyov Committed by Greg Kroah-Hartman
Browse files

sh_eth: fix TRSCER mask for R7S72100



[ Upstream commit 75be7fb7f978202c4c3a1a713af4485afb2ff5f6 ]

According  to  the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware,
Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use
the driver's default TRSCER mask.  Add the explicit initializer for
sh_eth_cpu_data::trscer_err_mask for R7S72100.

Fixes: db893473 ("sh_eth: Add support for r7s72100")
Signed-off-by: default avatarSergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent c3c1defa
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -610,6 +610,8 @@ static struct sh_eth_cpu_data r7s72100_data = {
			  EESR_TDE,
	.fdr_value	= 0x0000070f,

	.trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,

	.no_psr		= 1,
	.apr		= 1,
	.mpr		= 1,