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Commit 18b8bfdf authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'iommu-updates-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 

Pull IOMMU updates from Joerg Roedel:

 - PASID table handling updates for the Intel VT-d driver. It implements
   a global PASID space now so that applications usings multiple devices
   will just have one PASID.

 - A new config option to make iommu passthroug mode the default.

 - New sysfs attribute for iommu groups to export the type of the
   default domain.

 - A debugfs interface (for debug only) usable by IOMMU drivers to
   export internals to user-space.

 - R-Car Gen3 SoCs support for the ipmmu-vmsa driver

 - The ARM-SMMU now aborts transactions from unknown devices and devices
   not attached to any domain.

 - Various cleanups and smaller fixes all over the place.

* tag 'iommu-updates-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (42 commits)
  iommu/omap: Fix cache flushes on L2 table entries
  iommu: Remove the ->map_sg indirection
  iommu/arm-smmu-v3: Abort all transactions if SMMU is enabled in kdump kernel
  iommu/arm-smmu-v3: Prevent any devices access to memory without registration
  iommu/ipmmu-vmsa: Don't register as BUS IOMMU if machine doesn't have IPMMU-VMSA
  iommu/ipmmu-vmsa: Clarify supported platforms
  iommu/ipmmu-vmsa: Fix allocation in atomic context
  iommu: Add config option to set passthrough as default
  iommu: Add sysfs attribyte for domain type
  iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register
  iommu/arm-smmu: Error out only if not enough context interrupts
  iommu/io-pgtable-arm-v7s: Abort allocation when table address overflows the PTE
  iommu/io-pgtable-arm: Fix pgtable allocation in selftest
  iommu/vt-d: Remove the obsolete per iommu pasid tables
  iommu/vt-d: Apply per pci device pasid table in SVA
  iommu/vt-d: Allocate and free pasid table
  iommu/vt-d: Per PCI device pasid table interfaces
  iommu/vt-d: Add for_each_device_domain() helper
  iommu/vt-d: Move device_domain_info to header
  iommu/vt-d: Apply global PASID in SVA
  ...
parents d972604f 6488a7f3

Documentation/admin-guide/kernel-parameters.txt

+2 −1
Original line number Diff line number Diff line
@@ -1744,7 +1744,8 @@ 
		merge

		nomerge

		soft

		pt		[x86, IA-64]

		pt		[x86]

		nopt		[x86]

		nobypass	[PPC/POWERNV]

			Disable IOMMU bypass, using IOMMU for PCI devices.

Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt

+3 −0
Original line number Diff line number Diff line
@@ -19,7 +19,10 @@ Required Properties: 
    - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU.

    - "renesas,ipmmu-r8a7795" for the R8A7795 (R-Car H3) IPMMU.

    - "renesas,ipmmu-r8a7796" for the R8A7796 (R-Car M3-W) IPMMU.

    - "renesas,ipmmu-r8a77965" for the R8A77965 (R-Car M3-N) IPMMU.

    - "renesas,ipmmu-r8a77970" for the R8A77970 (R-Car V3M) IPMMU.

    - "renesas,ipmmu-r8a77980" for the R8A77980 (R-Car V3H) IPMMU.

    - "renesas,ipmmu-r8a77990" for the R8A77990 (R-Car E3) IPMMU.

    - "renesas,ipmmu-r8a77995" for the R8A77995 (R-Car D3) IPMMU.

    - "renesas,ipmmu-vmsa" for generic R-Car Gen2 or RZ/G1 VMSA-compatible

			   IPMMU.

arch/x86/include/asm/irq_remapping.h

+5 −0
Original line number Diff line number Diff line
@@ -33,6 +33,11 @@ enum irq_remap_cap { 
	IRQ_POSTING_CAP = 0,

};



enum {

	IRQ_REMAP_XAPIC_MODE,

	IRQ_REMAP_X2APIC_MODE,

};



struct vcpu_data {

	u64 pi_desc_addr;	/* Physical address of PI Descriptor */

	u32 vector;		/* Guest vector of the interrupt */

arch/x86/kernel/pci-dma.c

+8 −0
Original line number Diff line number Diff line
@@ -40,8 +40,14 @@ int iommu_detected __read_mostly = 0; 
 * devices and allow every device to access to whole physical memory. This is

 * useful if a user wants to use an IOMMU only for KVM device assignment to

 * guests and not for driver dma translation.

 * It is also possible to disable by default in kernel config, and enable with

 * iommu=nopt at boot time.

 */

#ifdef CONFIG_IOMMU_DEFAULT_PASSTHROUGH

int iommu_pass_through __read_mostly = 1;

#else

int iommu_pass_through __read_mostly;

#endif



extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
@@ -135,6 +141,8 @@ static __init int iommu_setup(char *p) 
#endif

		if (!strncmp(p, "pt", 2))

			iommu_pass_through = 1;

		if (!strncmp(p, "nopt", 4))

			iommu_pass_through = 0;



		gart_parse_options(p);

drivers/iommu/Kconfig

+35 −2
Original line number Diff line number Diff line
@@ -60,6 +60,27 @@ config IOMMU_IO_PGTABLE_ARMV7S_SELFTEST 


endmenu



config IOMMU_DEBUGFS

	bool "Export IOMMU internals in DebugFS"

	depends on DEBUG_FS

	help

	  Allows exposure of IOMMU device internals. This option enables

	  the use of debugfs by IOMMU drivers as required. Devices can,

	  at initialization time, cause the IOMMU code to create a top-level

	  debug/iommu directory, and then populate a subdirectory with

	  entries as required.



config IOMMU_DEFAULT_PASSTHROUGH

	bool "IOMMU passthrough by default"

	depends on IOMMU_API

        help

	  Enable passthrough by default, removing the need to pass in

	  iommu.passthrough=on or iommu=pt through command line. If this

	  is enabled, you can still disable with iommu.passthrough=off

	  or iommu=nopt depending on the architecture.



	  If unsure, say N here.



config IOMMU_IOVA

	tristate
@@ -135,6 +156,18 @@ config AMD_IOMMU_V2 
	  hardware. Select this option if you want to use devices that support

	  the PCI PRI and PASID interface.



config AMD_IOMMU_DEBUGFS

	bool "Enable AMD IOMMU internals in DebugFS"

	depends on AMD_IOMMU && IOMMU_DEBUGFS

	---help---

	  !!!WARNING!!!  !!!WARNING!!!  !!!WARNING!!!  !!!WARNING!!!



	  DO NOT ENABLE THIS OPTION UNLESS YOU REALLY, -REALLY- KNOW WHAT YOU ARE DOING!!!

	  Exposes AMD IOMMU device internals in DebugFS.



	  This option is -NOT- intended for production environments, and should

	  not generally be enabled.



# Intel IOMMU support

config DMAR_TABLE

	bool
@@ -284,8 +317,8 @@ config IPMMU_VMSA 
	select IOMMU_IO_PGTABLE_LPAE

	select ARM_DMA_USE_IOMMU

	help

	  Support for the Renesas VMSA-compatible IPMMU Renesas found in the

	  R-Mobile APE6 and R-Car H2/M2 SoCs.

	  Support for the Renesas VMSA-compatible IPMMU found in the R-Mobile

	  APE6, R-Car Gen2, and R-Car Gen3 SoCs.



	  If unsure, say N.