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Commit 1895759e authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

drm/i915: Use dp_to_i915 on intel_psr.c 



Now that we have a generic caller let's simplify it and
clean up the intel_psr.c code a bit.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180827223021.7145-2-rodrigo.vivi@intel.com
parent de25eb7f

drivers/gpu/drm/i915/intel_psr.c

+14 −36
Original line number Diff line number Diff line
@@ -270,7 +270,7 @@ static void intel_psr_setup_vsc(struct intel_dp *intel_dp, 
				const struct intel_crtc_state *crtc_state)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	struct edp_vsc_psr psr_vsc;



	if (dev_priv->psr.psr2_enabled) {
@@ -300,8 +300,7 @@ static void intel_psr_setup_vsc(struct intel_dp *intel_dp, 


static void hsw_psr_setup_aux(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	u32 aux_clock_divider, aux_ctl;

	int i;

	static const uint8_t aux_msg[] = {
@@ -334,9 +333,7 @@ static void hsw_psr_setup_aux(struct intel_dp *intel_dp) 


static void intel_psr_enable_sink(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	u8 dpcd_val = DP_PSR_ENABLE;



	/* Enable ALPM at sink for psr2 */
@@ -357,9 +354,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp) 


static void hsw_activate_psr1(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	u32 max_sleep_time = 0x1f;

	u32 val = EDP_PSR_ENABLE;
@@ -414,9 +409,7 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp) 


static void hsw_activate_psr2(struct intel_dp *intel_dp)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	u32 val;



	/* Let's use 6 as the minimum to cover all known cases including the
@@ -452,8 +445,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) 
static bool intel_psr2_config_valid(struct intel_dp *intel_dp,

				    struct intel_crtc_state *crtc_state)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;

	int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;

	int psr_max_h = 0, psr_max_v = 0;
@@ -488,7 +480,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, 
			      struct intel_crtc_state *crtc_state)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	const struct drm_display_mode *adjusted_mode =

		&crtc_state->base.adjusted_mode;

	int psr_setup_time;
@@ -544,9 +536,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, 


static void intel_psr_activate(struct intel_dp *intel_dp)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);



	if (INTEL_GEN(dev_priv) >= 9)

		WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE);
@@ -566,9 +556,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp) 
static void intel_psr_enable_source(struct intel_dp *intel_dp,

				    const struct intel_crtc_state *crtc_state)

{

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;



	/* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+
@@ -639,9 +627,7 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, 
void intel_psr_enable(struct intel_dp *intel_dp,

		      const struct intel_crtc_state *crtc_state)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);



	if (!crtc_state->has_psr)

		return;
@@ -673,9 +659,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, 
static void

intel_psr_disable_source(struct intel_dp *intel_dp)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);



	if (dev_priv->psr.active) {

		i915_reg_t psr_status;
@@ -714,9 +698,7 @@ intel_psr_disable_source(struct intel_dp *intel_dp) 


static void intel_psr_disable_locked(struct intel_dp *intel_dp)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);



	lockdep_assert_held(&dev_priv->psr.lock);
@@ -743,9 +725,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) 
void intel_psr_disable(struct intel_dp *intel_dp,

		       const struct intel_crtc_state *old_crtc_state)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);



	if (!old_crtc_state->has_psr)

		return;
@@ -1102,9 +1082,7 @@ void intel_psr_init(struct drm_i915_private *dev_priv) 


void intel_psr_short_pulse(struct intel_dp *intel_dp)

{

	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);

	struct drm_device *dev = intel_dig_port->base.base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	struct i915_psr *psr = &dev_priv->psr;

	u8 val;

	const u8 errors = DP_PSR_RFB_STORAGE_ERROR |