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Commit 17846547 authored by Dietmar Eggemann's avatar Dietmar Eggemann Committed by Krzysztof Kozlowski
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ARM: dts: exynos: add exynos5422 cpu capacity-dmips-mhz information 

The following 'capacity-dmips-mhz' dt property values are used:

Cortex-A15: 1024, Cortex-A7: 539

They have been derived form the cpu_efficiency values:

Cortex-A15: 3891, Cortex-A7: 2048

by scaling them so that the Cortex-A15s (big cores) use 1024.

The cpu_efficiency values were originally derived from the "Big.LITTLE
Processing with ARM Cortex™-A15 & Cortex-A7" white paper
(http://www.cl.cam.ac.uk/~rdm34/big.LITTLE.pdf

). Table 1 lists 1.9x
(3891/2048) as the Cortex-A15 vs Cortex-A7 performance ratio for the
Dhrystone benchmark.

The following platforms are affected once cpu-invariant accounting
support is re-connected to the task scheduler:

odroidxu3, odroidxu3-lite, odroidxu4

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 45bfc2a3

arch/arm/boot/dts/exynos5422-cpus.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <11>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <539>;

		};



		cpu1: cpu@101 {
@@ -47,6 +48,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <11>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <539>;

		};



		cpu2: cpu@102 {
@@ -59,6 +61,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <11>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <539>;

		};



		cpu3: cpu@103 {
@@ -71,6 +74,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <11>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <539>;

		};



		cpu4: cpu@0 {
@@ -84,6 +88,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <15>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <1024>;

		};



		cpu5: cpu@1 {
@@ -96,6 +101,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <15>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <1024>;

		};



		cpu6: cpu@2 {
@@ -108,6 +114,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <15>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <1024>;

		};



		cpu7: cpu@3 {
@@ -120,6 +127,7 @@ 
			cooling-min-level = <0>;

			cooling-max-level = <15>;

			#cooling-cells = <2>; /* min followed by max */

			capacity-dmips-mhz = <1024>;

		};

	};

};