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Commit 1696d0fb authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64: Set DSCR default initially from SPR 



Take the DSCR value set by firmware as the dscr_default value,
rather than zero.

POWER9 recommends DSCR default to a non-zero value.

Signed-off-by: default avatarFrom: Nicholas Piggin <npiggin@gmail.com>
[mpe: Make record_spr_defaults() __init]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 339a3293

arch/powerpc/kernel/setup.h

+6 −0
Original line number Diff line number Diff line
@@ -45,6 +45,12 @@ void emergency_stack_init(void); 
static inline void emergency_stack_init(void) { };

#endif



#ifdef CONFIG_PPC64

void record_spr_defaults(void);

#else

static inline void record_spr_defaults(void) { };

#endif



/*

 * Having this in kvm_ppc.h makes include dependencies too

 * tricky to solve for setup-common.c so have it here.

arch/powerpc/kernel/setup_64.c

+9 −0
Original line number Diff line number Diff line
@@ -69,6 +69,8 @@ 
#include <asm/opal.h>

#include <asm/cputhreads.h>



#include "setup.h"



#ifdef DEBUG

#define DBG(fmt...) udbg_printf(fmt)

#else
@@ -316,6 +318,13 @@ void __init early_setup(unsigned long dt_ptr) 
	/* Initialize the hash table or TLB handling */

	early_init_mmu();



	/*

	 * After firmware and early platform setup code has set things up,

	 * we note the SPR values for configurable control/performance

	 * registers, and use those as initial defaults.

	 */

	record_spr_defaults();



	/*

	 * At this point, we can let interrupts switch to virtual mode

	 * (the MMU has been setup), so adjust the MSR in the PACA to

arch/powerpc/kernel/sysfs.c

+11 −0
Original line number Diff line number Diff line
@@ -590,6 +590,17 @@ static void sysfs_create_dscr_default(void) 
	if (cpu_has_feature(CPU_FTR_DSCR))

		err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);

}



void __init record_spr_defaults(void)

{

	int cpu;



	if (cpu_has_feature(CPU_FTR_DSCR)) {

		dscr_default = mfspr(SPRN_DSCR);

		for (cpu = 0; cpu < nr_cpu_ids; cpu++)

			paca[cpu].dscr_default = dscr_default;

	}

}

#endif /* CONFIG_PPC64 */



#ifdef HAS_PPC_PMC_PA6T