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Commit 163541e6 authored by Jiong Wang's avatar Jiong Wang Committed by Alexei Starovoitov
Browse files

arm: bpf: eliminate zero extension code-gen 



Cc: Shubham Bansal <illusionist.neo@gmail.com>
Signed-off-by: default avatarJiong Wang <jiong.wang@netronome.com>
Signed-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
parent 9d120b41

arch/arm/net/bpf_jit_32.c

+31 −11
Original line number Diff line number Diff line
@@ -736,6 +736,7 @@ static inline void emit_a32_alu_r64(const bool is64, const s8 dst[], 


		/* ALU operation */

		emit_alu_r(rd[1], rs, true, false, op, ctx);

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(rd[0], 0, ctx);

	}
@@ -758,6 +759,7 @@ static inline void emit_a32_mov_r64(const bool is64, const s8 dst[], 
				  struct jit_ctx *ctx) {

	if (!is64) {

		emit_a32_mov_r(dst_lo, src_lo, ctx);

		if (!ctx->prog->aux->verifier_zext)

			/* Zero out high 4 bytes */

			emit_a32_mov_i(dst_hi, 0, ctx);

	} else if (__LINUX_ARM_ARCH__ < 6 &&
@@ -1060,16 +1062,19 @@ static inline void emit_ldx_r(const s8 dst[], const s8 src, 
	case BPF_B:

		/* Load a Byte */

		emit(ARM_LDRB_I(rd[1], rm, off), ctx);

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(rd[0], 0, ctx);

		break;

	case BPF_H:

		/* Load a HalfWord */

		emit(ARM_LDRH_I(rd[1], rm, off), ctx);

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(rd[0], 0, ctx);

		break;

	case BPF_W:

		/* Load a Word */

		emit(ARM_LDR_I(rd[1], rm, off), ctx);

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(rd[0], 0, ctx);

		break;

	case BPF_DW:
@@ -1359,6 +1364,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 
	case BPF_ALU64 | BPF_MOV | BPF_X:

		switch (BPF_SRC(code)) {

		case BPF_X:

			if (imm == 1) {

				/* Special mov32 for zext */

				emit_a32_mov_i(dst_hi, 0, ctx);

				break;

			}

			emit_a32_mov_r64(is64, dst, src, ctx);

			break;

		case BPF_K:
@@ -1438,6 +1448,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 
		}

		emit_udivmod(rd_lo, rd_lo, rt, ctx, BPF_OP(code));

		arm_bpf_put_reg32(dst_lo, rd_lo, ctx);

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(dst_hi, 0, ctx);

		break;

	case BPF_ALU64 | BPF_DIV | BPF_K:
@@ -1453,6 +1464,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 
			return -EINVAL;

		if (imm)

			emit_a32_alu_i(dst_lo, imm, ctx, BPF_OP(code));

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(dst_hi, 0, ctx);

		break;

	/* dst = dst << imm */
@@ -1488,6 +1500,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 
	/* dst = ~dst */

	case BPF_ALU | BPF_NEG:

		emit_a32_alu_i(dst_lo, 0, ctx, BPF_OP(code));

		if (!ctx->prog->aux->verifier_zext)

			emit_a32_mov_i(dst_hi, 0, ctx);

		break;

	/* dst = ~dst (64 bit) */
@@ -1544,10 +1557,12 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) 
#else /* ARMv6+ */

			emit(ARM_UXTH(rd[1], rd[1]), ctx);

#endif

			if (!ctx->prog->aux->verifier_zext)

				emit(ARM_EOR_R(rd[0], rd[0], rd[0]), ctx);

			break;

		case 32:

			/* zero-extend 32 bits into 64 bits */

			if (!ctx->prog->aux->verifier_zext)

				emit(ARM_EOR_R(rd[0], rd[0], rd[0]), ctx);

			break;

		case 64:
@@ -1838,6 +1853,11 @@ void bpf_jit_compile(struct bpf_prog *prog) 
	/* Nothing to do here. We support Internal BPF. */

}



bool bpf_jit_needs_zext(void)

{

	return true;

}



struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)

{

	struct bpf_prog *tmp, *orig_prog = prog;