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Commit 161dea83 authored by Igor Russkikh's avatar Igor Russkikh Committed by David S. Miller
Browse files

net: aquantia: added vlan offload related macros and functions 



Register declaration macros required to work with vlan offload mode.

Tested-by: default avatarNikita Danilov <ndanilov@aquantia.com>
Signed-off-by: default avatarIgor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 17f54a3b

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h

+7 −0
Original line number Diff line number Diff line
@@ -107,10 +107,17 @@ 
#define HW_ATL_B0_RXD_NCEA0 (0x1)



#define HW_ATL_B0_RXD_WB_STAT_RSSTYPE (0x0000000F)

#define HW_ATL_B0_RXD_WB_STAT_RSSTYPE_SHIFT (0x0)

#define HW_ATL_B0_RXD_WB_STAT_PKTTYPE (0x00000FF0)

#define HW_ATL_B0_RXD_WB_STAT_PKTTYPE_SHIFT (0x4)

#define HW_ATL_B0_RXD_WB_STAT_RXCTRL  (0x00180000)

#define HW_ATL_B0_RXD_WB_STAT_RXCTRL_SHIFT (0x13)

#define HW_ATL_B0_RXD_WB_STAT_SPLHDR  (0x00200000)

#define HW_ATL_B0_RXD_WB_STAT_HDRLEN  (0xFFC00000)

#define HW_ATL_B0_RXD_WB_STAT_HDRLEN_SHIFT (0x16)



#define HW_ATL_B0_RXD_WB_PKTTYPE_VLAN          BIT(5)

#define HW_ATL_B0_RXD_WB_PKTTYPE_VLAN_DOUBLE   BIT(6)



#define HW_ATL_B0_RXD_WB_STAT2_DD      (0x0001)

#define HW_ATL_B0_RXD_WB_STAT2_EOP     (0x0002)

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c

+16 −0
Original line number Diff line number Diff line
@@ -1004,6 +1004,22 @@ void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw, 
			    rx_desc_vlan_stripping);

}



void hw_atl_rpo_outer_vlan_tag_mode_set(void *context,

					u32 outervlantagmode)

{

	aq_hw_write_reg_bit(context, HW_ATL_RPO_OUTER_VL_INS_MODE_ADR,

			    HW_ATL_RPO_OUTER_VL_INS_MODE_MSK,

			    HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT,

			    outervlantagmode);

}



u32 hw_atl_rpo_outer_vlan_tag_mode_get(void *context)

{

	return aq_hw_read_reg_bit(context, HW_ATL_RPO_OUTER_VL_INS_MODE_ADR,

				  HW_ATL_RPO_OUTER_VL_INS_MODE_MSK,

				  HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT);

}



void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,

					   u32 tcp_udp_crc_offload_en)

{

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h

+5 −0
Original line number Diff line number Diff line
@@ -488,6 +488,11 @@ void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw, 
					   u32 rx_desc_vlan_stripping,

					   u32 descriptor);



void hw_atl_rpo_outer_vlan_tag_mode_set(void *context,

					u32 outervlantagmode);



u32 hw_atl_rpo_outer_vlan_tag_mode_get(void *context);



/* set tcp/udp checksum offload enable */

void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,

					   u32 tcp_udp_crc_offload_en);

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h

+18 −0
Original line number Diff line number Diff line
@@ -1383,6 +1383,24 @@ 
/* default value of bitfield l4_chk_en */

#define HW_ATL_RPOL4CHK_EN_DEFAULT 0x0



/* RX outer_vl_ins_mode Bitfield Definitions

 * Preprocessor definitions for the bitfield "outer_vl_ins_mode".

 * PORT="pif_rpo_outer_vl_mode_i"

 */



/* Register address for bitfield outer_vl_ins_mode */

#define HW_ATL_RPO_OUTER_VL_INS_MODE_ADR 0x00005580

/* Bitmask for bitfield outer_vl_ins_mode */

#define HW_ATL_RPO_OUTER_VL_INS_MODE_MSK 0x00000004

/* Inverted bitmask for bitfield outer_vl_ins_mode */

#define HW_ATL_RPO_OUTER_VL_INS_MODE_MSKN 0xFFFFFFFB

/* Lower bit position of bitfield outer_vl_ins_mode */

#define HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT 2

/* Width of bitfield outer_vl_ins_mode */

#define HW_ATL_RPO_OUTER_VL_INS_MODE_WIDTH 1

/* Default value of bitfield outer_vl_ins_mode */

#define HW_ATL_RPO_OUTER_VL_INS_MODE_DEFAULT 0x0



/* rx reg_res_dsbl bitfield definitions

 * preprocessor definitions for the bitfield "reg_res_dsbl".

 * port="pif_rx_reg_res_dsbl_i"