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Commit 15f441db authored by Tom St Denis's avatar Tom St Denis Committed by Alex Deucher
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drm/amd/amdgpu: Tidy up cz_dpm.c



Various minor formatting changes.

Signed-off-by: default avatarTom St Denis <tom.stdenis@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e701f97f
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+11 −20
Original line number Diff line number Diff line
@@ -678,17 +678,12 @@ static void cz_reset_ap_mask(struct amdgpu_device *adev)
	struct cz_power_info *pi = cz_get_pi(adev);

	pi->active_process_mask = 0;

}

static int cz_dpm_download_pptable_from_smu(struct amdgpu_device *adev,
							void **table)
{
	int ret = 0;

	ret = cz_smu_download_pptable(adev, table);

	return ret;
	return cz_smu_download_pptable(adev, table);
}

static int cz_dpm_upload_pptable_to_smu(struct amdgpu_device *adev)
@@ -828,9 +823,9 @@ static void cz_init_sclk_limit(struct amdgpu_device *adev)
	pi->sclk_dpm.hard_min_clk = 0;
	cz_send_msg_to_smc(adev, PPSMC_MSG_GetMaxSclkLevel);
	level = cz_get_argument(adev);
	if (level < table->count)
	if (level < table->count) {
		clock = table->entries[level].clk;
	else {
	} else {
		DRM_ERROR("Invalid SLCK Voltage Dependency table entry.\n");
		clock = table->entries[table->count - 1].clk;
	}
@@ -856,9 +851,9 @@ static void cz_init_uvd_limit(struct amdgpu_device *adev)
	pi->uvd_dpm.hard_min_clk = 0;
	cz_send_msg_to_smc(adev, PPSMC_MSG_GetMaxUvdLevel);
	level = cz_get_argument(adev);
	if (level < table->count)
	if (level < table->count) {
		clock = table->entries[level].vclk;
	else {
	} else {
		DRM_ERROR("Invalid UVD Voltage Dependency table entry.\n");
		clock = table->entries[table->count - 1].vclk;
	}
@@ -884,9 +879,9 @@ static void cz_init_vce_limit(struct amdgpu_device *adev)
	pi->vce_dpm.hard_min_clk = table->entries[0].ecclk;
	cz_send_msg_to_smc(adev, PPSMC_MSG_GetMaxEclkLevel);
	level = cz_get_argument(adev);
	if (level < table->count)
	if (level < table->count) {
		clock = table->entries[level].ecclk;
	else {
	} else {
		/* future BIOS would fix this error */
		DRM_ERROR("Invalid VCE Voltage Dependency table entry.\n");
		clock = table->entries[table->count - 1].ecclk;
@@ -913,9 +908,9 @@ static void cz_init_acp_limit(struct amdgpu_device *adev)
	pi->acp_dpm.hard_min_clk = 0;
	cz_send_msg_to_smc(adev, PPSMC_MSG_GetMaxAclkLevel);
	level = cz_get_argument(adev);
	if (level < table->count)
	if (level < table->count) {
		clock = table->entries[level].clk;
	else {
	} else {
		DRM_ERROR("Invalid ACP Voltage Dependency table entry.\n");
		clock = table->entries[table->count - 1].clk;
	}
@@ -940,7 +935,6 @@ static void cz_init_sclk_threshold(struct amdgpu_device *adev)
	struct cz_power_info *pi = cz_get_pi(adev);

	pi->low_sclk_interrupt_threshold = 0;

}

static void cz_dpm_setup_asic(struct amdgpu_device *adev)
@@ -1345,7 +1339,6 @@ static int cz_dpm_enable(struct amdgpu_device *adev)
	}

	cz_reset_acp_boot_level(adev);

	cz_update_current_ps(adev, adev->pm.dpm.boot_ps);

	return 0;
@@ -1675,7 +1668,6 @@ static void cz_dpm_post_set_power_state(struct amdgpu_device *adev)
	struct amdgpu_ps *ps = &pi->requested_rps;

	cz_update_current_ps(adev, ps);

}

static int cz_dpm_force_highest(struct amdgpu_device *adev)
@@ -2207,7 +2199,6 @@ static int cz_update_vce_dpm(struct amdgpu_device *adev)
	/* Stable Pstate is enabled and we need to set the VCE DPM to highest level */
	if (pi->caps_stable_power_state) {
		pi->vce_dpm.hard_min_clk = table->entries[table->count-1].ecclk;

	} else { /* non-stable p-state cases. without vce.Arbiter.EcclkHardMin */
		/* leave it as set by user */
		/*pi->vce_dpm.hard_min_clk = table->entries[0].ecclk;*/