Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 15d5e755 authored by Hemant Kumar's avatar Hemant Kumar Committed by Jack Pham
Browse files

usb: dwc3: Increase the inter packet gap for USB 2.0 



Default 0 value for IP_GAP_ADD_ON field of DWC3_GUCTL1
register is causing failure of EL_23 test. This value
corresponds to inter-packet gap of 182.163 ns. Increase
the value to 1 which corresponds to 199.794 ns. This
improves margin required to pass the test.

Change-Id: Iabc71a746ac90251eaec25597d8506df416796a5
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
Signed-off-by: default avatarJack Pham <jackp@codeaurora.org>
parent a82524f1

drivers/usb/dwc3/core.c

+7 −0
Original line number Diff line number Diff line
@@ -1049,6 +1049,13 @@ static int dwc3_core_init(struct dwc3 *dwc) 
		}

	}



	/* set inter-packet gap 199.794ns to improve EL_23 margin */

	if (dwc->revision >= DWC3_USB31_REVISION_170A) {

		reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);

		reg |= DWC3_GUCTL1_IP_GAP_ADD_ON(1);

		dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);

	}



	return 0;



err4:

drivers/usb/dwc3/core.h

+1 −0
Original line number Diff line number Diff line
@@ -251,6 +251,7 @@ 
/* Global User Control 1 Register */

#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS	BIT(28)

#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW	BIT(24)

#define DWC3_GUCTL1_IP_GAP_ADD_ON(n)	(n << 21)



/* Global Status Register */

#define DWC3_GSTS_OTG_IP	BIT(10)