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Commit 157b4129 authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: arm: fsl: Move DCFG and SCFG bindings to their own docs 



In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.

Acked-by: default avatarShawn Guo <shawnguo@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 79fbf76d

Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt

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Freescale DCFG



DCFG is the device configuration unit, that provides general purpose

configuration and status for the device. Such as setting the secondary

core start address and release the secondary core from holdoff and startup.



Required properties:

  - compatible: Should contain a chip-specific compatible string,

	Chip-specific strings are of the form "fsl,<chip>-dcfg",

	The following <chip>s are known to be supported:

	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.



  - reg : should contain base address and length of DCFG memory-mapped registers



Example:

	dcfg: dcfg@1ee0000 {

		compatible = "fsl,ls1021a-dcfg";

		reg = <0x0 0x1ee0000 0x0 0x10000>;

	};

Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt

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Freescale SCFG



SCFG is the supplemental configuration unit, that provides SoC specific

configuration and status registers for the chip. Such as getting PEX port

status.



Required properties:

  - compatible: Should contain a chip-specific compatible string,

	Chip-specific strings are of the form "fsl,<chip>-scfg",

	The following <chip>s are known to be supported:

	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.



  - reg: should contain base address and length of SCFG memory-mapped registers



Example:

	scfg: scfg@1570000 {

		compatible = "fsl,ls1021a-scfg";

		reg = <0x0 0x1570000 0x0 0x10000>;

	};

Documentation/devicetree/bindings/arm/fsl.txt

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Original line number Diff line number Diff line
@@ -101,45 +101,6 @@ Freescale LS1021A Platform Device Tree Bindings 
Required root node compatible properties:

  - compatible = "fsl,ls1021a";



Freescale SoC-specific Device Tree Bindings

-------------------------------------------



Freescale SCFG

  SCFG is the supplemental configuration unit, that provides SoC specific

configuration and status registers for the chip. Such as getting PEX port

status.

  Required properties:

  - compatible: Should contain a chip-specific compatible string,

	Chip-specific strings are of the form "fsl,<chip>-scfg",

	The following <chip>s are known to be supported:

	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.



  - reg: should contain base address and length of SCFG memory-mapped registers



Example:

	scfg: scfg@1570000 {

		compatible = "fsl,ls1021a-scfg";

		reg = <0x0 0x1570000 0x0 0x10000>;

	};



Freescale DCFG

  DCFG is the device configuration unit, that provides general purpose

configuration and status for the device. Such as setting the secondary

core start address and release the secondary core from holdoff and startup.

  Required properties:

  - compatible: Should contain a chip-specific compatible string,

	Chip-specific strings are of the form "fsl,<chip>-dcfg",

	The following <chip>s are known to be supported:

	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.



  - reg : should contain base address and length of DCFG memory-mapped registers



Example:

	dcfg: dcfg@1ee0000 {

		compatible = "fsl,ls1021a-dcfg";

		reg = <0x0 0x1ee0000 0x0 0x10000>;

	};



Freescale ARMv8 based Layerscape SoC family Device Tree Bindings

----------------------------------------------------------------