Loading qcom/sm6150.dtsi +19 −0 Original line number Diff line number Diff line Loading @@ -637,6 +637,12 @@ }; }; llcc_pmu: llcc-pmu@90cc000 { compatible = "qcom,llcc-pmu-ver2"; reg = <0x090cc000 0x300>; reg-names = "lagg-base"; }; llcc_bw_opp_table: llcc-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 150, 16); /* 2288 MB/s */ Loading Loading @@ -928,6 +934,19 @@ }; }; cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; }; dsu_pmu@0 { compatible = "arm,dsu-pmu"; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; cpus = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>, <&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>; }; qcom,msm-imem@146aa000 { compatible = "qcom,msm-imem"; reg = <0x146aa000 0x1000>; Loading Loading
qcom/sm6150.dtsi +19 −0 Original line number Diff line number Diff line Loading @@ -637,6 +637,12 @@ }; }; llcc_pmu: llcc-pmu@90cc000 { compatible = "qcom,llcc-pmu-ver2"; reg = <0x090cc000 0x300>; reg-names = "lagg-base"; }; llcc_bw_opp_table: llcc-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 150, 16); /* 2288 MB/s */ Loading Loading @@ -928,6 +934,19 @@ }; }; cpu_pmu: cpu-pmu { compatible = "arm,armv8-pmuv3"; qcom,irq-is-percpu; interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; }; dsu_pmu@0 { compatible = "arm,dsu-pmu"; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; cpus = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>, <&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>; }; qcom,msm-imem@146aa000 { compatible = "qcom,msm-imem"; reg = <0x146aa000 0x1000>; Loading