Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 14d6f644 authored by Yongqiang Sun's avatar Yongqiang Sun Committed by Alex Deucher
Browse files

drm/amd/display: Fixed dim around 1sec when resume from S3 (v2) 



root cause:
DMCU try to perform a smoothness brightness change.Incorrect initial
brightness level causes the 1 sec dim.
Change:
Cache brightness level in stream, and clear it when edp backlight on.
If brightness level in stream is 0, set brightness with ramp value is 0.
DMCU will set the brightness without smoothness transition.

v2: squash in null pointer fix (Harry)

Signed-off-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2a54bd6e

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+7 −0
Original line number Diff line number Diff line
@@ -1960,6 +1960,13 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level, 
		(abm->funcs->set_backlight_level == NULL))

		return false;



	if (stream) {

		if (stream->bl_pwm_level == 0)

			frame_ramp = 0;



		((struct dc_stream_state *)stream)->bl_pwm_level = level;

	}



	use_smooth_brightness = dmcu->funcs->is_dmcu_initialized(dmcu);



	DC_LOG_BACKLIGHT("New Backlight level: %d (0x%X)\n", level, level);

drivers/gpu/drm/amd/display/dc/dc_stream.h

+1 −0
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@ struct dc_stream_state { 


	/* DMCU info */

	unsigned int abm_level;

	unsigned int bl_pwm_level;



	/* from core_stream struct */

	struct dc_context *ctx;

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+3 −1
Original line number Diff line number Diff line
@@ -1006,8 +1006,10 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx, 
	if (dc_is_dp_signal(pipe_ctx->stream->signal))

		pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, &params);



	if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP)

	if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP) {

		link->dc->hwss.edp_backlight_control(link, true);

		stream->bl_pwm_level = 0;

	}

}

void dce110_blank_stream(struct pipe_ctx *pipe_ctx)

{