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Commit 14d188bb authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v3.7-rc2/fixes-signed' of...

Merge tag 'omap-for-v3.7-rc2/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren <tony@atomide.com>:

Timer fix for am33xx, runtime PM fix for UART, audio McBSP fixes,
mux and pinctrl fixes, and Beagle OPP fix.

* tag 'omap-for-v3.7-rc2/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: AM33XX: Fix configuration of dmtimer parent clock by dmtimer driverDate:Wed, 17 Oct 2012 13:55:55 -0500
  ARM: OMAP3: Beagle: fix OPP customization and initcall ordering
  ARM: OMAP3: Fix 3430 legacy mux names for ssi1 signals.
  ARM: OMAP2+: Fix location of select PINCTRL
  ARM/dts: omap3: Fix mcbsp2/3 hwmods to be able to probe the drivers for audio
  ARM: OMAP2: UART: fix console UART mismatched runtime PM status
  ARM: OMAP3: PM: apply part of the erratum i582 workaround

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d323c243 12ac7f9e
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+2 −2
Original line number Original line Diff line number Diff line
@@ -257,7 +257,7 @@
			interrupt-names = "common", "tx", "rx", "sidetone";
			interrupt-names = "common", "tx", "rx", "sidetone";
			interrupt-parent = <&intc>;
			interrupt-parent = <&intc>;
			ti,buffer-size = <1280>;
			ti,buffer-size = <1280>;
			ti,hwmods = "mcbsp2";
			ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
		};
		};


		mcbsp3: mcbsp@49024000 {
		mcbsp3: mcbsp@49024000 {
@@ -272,7 +272,7 @@
			interrupt-names = "common", "tx", "rx", "sidetone";
			interrupt-names = "common", "tx", "rx", "sidetone";
			interrupt-parent = <&intc>;
			interrupt-parent = <&intc>;
			ti,buffer-size = <128>;
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp3";
			ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
		};
		};


		mcbsp4: mcbsp@49026000 {
		mcbsp4: mcbsp@49026000 {
+0 −1
Original line number Original line Diff line number Diff line
@@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL
	select I2C_OMAP
	select I2C_OMAP
	select MENELAUS if ARCH_OMAP2
	select MENELAUS if ARCH_OMAP2
	select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
	select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
	select PINCTRL
	select PM_RUNTIME
	select PM_RUNTIME
	select REGULATOR
	select REGULATOR
	select SERIAL_OMAP
	select SERIAL_OMAP
+13 −9
Original line number Original line Diff line number Diff line
@@ -24,6 +24,7 @@
#include <linux/input.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/gpio_keys.h>
#include <linux/opp.h>
#include <linux/opp.h>
#include <linux/cpu.h>


#include <linux/mtd/mtd.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/partitions.h>
@@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = {
};
};
#endif
#endif


static void __init beagle_opp_init(void)
static int __init beagle_opp_init(void)
{
{
	int r = 0;
	int r = 0;


	/* Initialize the omap3 opp table */
	if (!machine_is_omap3_beagle())
	if (omap3_opp_init()) {
		return 0;

	/* Initialize the omap3 opp table if not already created. */
	r = omap3_opp_init();
	if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
		pr_err("%s: opp default init failed\n", __func__);
		pr_err("%s: opp default init failed\n", __func__);
		return;
		return r;
	}
	}


	/* Custom OPP enabled for all xM versions */
	/* Custom OPP enabled for all xM versions */
	if (cpu_is_omap3630()) {
	if (cpu_is_omap3630()) {
		struct device *mpu_dev, *iva_dev;
		struct device *mpu_dev, *iva_dev;


		mpu_dev = omap_device_get_by_hwmod_name("mpu");
		mpu_dev = get_cpu_device(0);
		iva_dev = omap_device_get_by_hwmod_name("iva");
		iva_dev = omap_device_get_by_hwmod_name("iva");


		if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
		if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
			pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
			pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
				__func__, mpu_dev, iva_dev);
				__func__, mpu_dev, iva_dev);
			return;
			return -ENODEV;
		}
		}
		/* Enable MPU 1GHz and lower opps */
		/* Enable MPU 1GHz and lower opps */
		r = opp_enable(mpu_dev, 800000000);
		r = opp_enable(mpu_dev, 800000000);
@@ -484,8 +489,9 @@ static void __init beagle_opp_init(void)
			opp_disable(iva_dev, 660000000);
			opp_disable(iva_dev, 660000000);
		}
		}
	}
	}
	return;
	return 0;
}
}
device_initcall(beagle_opp_init);


static void __init omap3_beagle_init(void)
static void __init omap3_beagle_init(void)
{
{
@@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void)
	/* Ensure SDRC pins are mux'd for self-refresh */
	/* Ensure SDRC pins are mux'd for self-refresh */
	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);

	beagle_opp_init();
}
}


MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
+2 −0
Original line number Original line Diff line number Diff line
@@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = {
	CLK(NULL,	"gfx_fck_div_ck",	&gfx_fck_div_ck,	CK_AM33XX),
	CLK(NULL,	"gfx_fck_div_ck",	&gfx_fck_div_ck,	CK_AM33XX),
	CLK(NULL,	"sysclkout_pre_ck",	&sysclkout_pre_ck,	CK_AM33XX),
	CLK(NULL,	"sysclkout_pre_ck",	&sysclkout_pre_ck,	CK_AM33XX),
	CLK(NULL,	"clkout2_ck",		&clkout2_ck,	CK_AM33XX),
	CLK(NULL,	"clkout2_ck",		&clkout2_ck,	CK_AM33XX),
	CLK(NULL,	"timer_32k_ck",		&clkdiv32k_ick,	CK_AM33XX),
	CLK(NULL,	"timer_sys_ck",		&sys_clkin_ck,	CK_AM33XX),
};
};


int __init am33xx_clk_init(void)
int __init am33xx_clk_init(void)
+4 −4
Original line number Original line Diff line number Diff line
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
		"sys_off_mode", NULL, NULL, NULL,
		"sys_off_mode", NULL, NULL, NULL,
		"gpio_9", NULL, NULL, "safe_mode"),
		"gpio_9", NULL, NULL, "safe_mode"),
	_OMAP3_MUXENTRY(UART1_CTS, 150,
	_OMAP3_MUXENTRY(UART1_CTS, 150,
		"uart1_cts", NULL, NULL, NULL,
		"uart1_cts", "ssi1_rdy_tx", NULL, NULL,
		"gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
		"gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
	_OMAP3_MUXENTRY(UART1_RTS, 149,
	_OMAP3_MUXENTRY(UART1_RTS, 149,
		"uart1_rts", NULL, NULL, NULL,
		"uart1_rts", "ssi1_flag_tx", NULL, NULL,
		"gpio_149", NULL, NULL, "safe_mode"),
		"gpio_149", NULL, NULL, "safe_mode"),
	_OMAP3_MUXENTRY(UART1_RX, 151,
	_OMAP3_MUXENTRY(UART1_RX, 151,
		"uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk",
		"uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
		"gpio_151", NULL, NULL, "safe_mode"),
		"gpio_151", NULL, NULL, "safe_mode"),
	_OMAP3_MUXENTRY(UART1_TX, 148,
	_OMAP3_MUXENTRY(UART1_TX, 148,
		"uart1_tx", NULL, NULL, NULL,
		"uart1_tx", "ssi1_dat_tx", NULL, NULL,
		"gpio_148", NULL, NULL, "safe_mode"),
		"gpio_148", NULL, NULL, "safe_mode"),
	_OMAP3_MUXENTRY(UART2_CTS, 144,
	_OMAP3_MUXENTRY(UART2_CTS, 144,
		"uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
		"uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
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