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Commit 14cfde84 authored by xinhui pan's avatar xinhui pan Committed by Alex Deucher
Browse files

drm/amdgpu: Add a check to avoid panic because of unexpected irqs 



IP initialize ras in late_init, because of the BUGs of PSP or any
other components, driver receives unexpected irqs. It is ok to add such
check anyway.

Signed-off-by: default avatarxinhui pan <xinhui.pan@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7dd609da

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+7 −1
Original line number Diff line number Diff line
@@ -4840,10 +4840,16 @@ static int gfx_v9_0_cp_ecc_error_irq(struct amdgpu_device *adev, 
				  struct amdgpu_irq_src *source,

				  struct amdgpu_iv_entry *entry)

{

	struct ras_common_if *ras_if = adev->gfx.ras_if;

	struct ras_dispatch_if ih_data = {

		.head = *adev->gfx.ras_if,

		.entry = entry,

	};



	if (!ras_if)

		return 0;



	ih_data.head = *ras_if;



	DRM_ERROR("CP ECC ERROR IRQ\n");

	amdgpu_ras_interrupt_dispatch(adev, &ih_data);

	return 0;

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+7 −1
Original line number Diff line number Diff line
@@ -248,10 +248,16 @@ static int gmc_v9_0_process_ecc_irq(struct amdgpu_device *adev, 
		struct amdgpu_irq_src *source,

		struct amdgpu_iv_entry *entry)

{

	struct ras_common_if *ras_if = adev->gmc.ras_if;

	struct ras_dispatch_if ih_data = {

		.head = *adev->gmc.ras_if,

		.entry = entry,

	};



	if (!ras_if)

		return 0;



	ih_data.head = *ras_if;



	amdgpu_ras_interrupt_dispatch(adev, &ih_data);

	return 0;

}

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+7 −1
Original line number Diff line number Diff line
@@ -1865,10 +1865,16 @@ static int sdma_v4_0_process_ecc_irq(struct amdgpu_device *adev, 
				      struct amdgpu_irq_src *source,

				      struct amdgpu_iv_entry *entry)

{

	struct ras_common_if *ras_if = adev->sdma.ras_if;

	struct ras_dispatch_if ih_data = {

		.head = *adev->sdma.ras_if,

		.entry = entry,

	};



	if (!ras_if)

		return 0;



	ih_data.head = *ras_if;



	amdgpu_ras_interrupt_dispatch(adev, &ih_data);

	return 0;

}