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Commit 14cc957b authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add vdd parent supply for holi GPU"

parents b34b01c1 3561926f

bindings/gpu/adreno.txt

+4 −0
Original line number Diff line number Diff line
@@ -66,6 +66,8 @@ GDSC Oxili Regulators: 
- regulator-names:		List of regulator name strings sorted in power-on order

- vddcx-supply:			Phandle for vddcx regulator device node.

- vdd-supply:			Phandle for vdd regulator device node.

- vdd-parent-supply:		Phandle for vdd parent regulator device node.

- vdd-parent-min-corner:	Minimum voltage corner value to set vdd parent supply.



IOMMU Data:

- iommu:			Phandle for the KGSL IOMMU device node
@@ -355,6 +357,8 @@ Example of A330 GPU in MSM8916: 


		/* GDSC oxili regulators */

		vdd-supply = <&gdsc_oxili_gx>;

		vdd-parent-supply = <&VDD_GFX_LEVEL>;

		vdd-parent-min-corner = <RPM_SMD_REGULATOR_LEVEL_RETENTION>;



		nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>;

		nvmem-cell-names = "speed_bin", "gaming_bin";

qcom/holi-gpu.dtsi

+4 −0
Original line number Diff line number Diff line 
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>



#define MHZ_TO_KBPS(mhz, w) ((mhz * 1000000 * w) / (1024))

&soc {

	pil_gpu: qcom,kgsl-hyp {
@@ -30,6 +32,8 @@ msm_gpu: qcom,kgsl-3d0@5900000 { 


		vddcx-supply = <&gpu_cx_gdsc>;

		vdd-supply = <&gpu_gx_gdsc>;

		vdd-parent-supply = <&VDD_GFX_LEVEL>;

		vdd-parent-min-corner = <RPM_SMD_REGULATOR_LEVEL_RETENTION>;

		qcom,chipid = <0x06010900>;



		nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>;