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Commit 14a43062 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Remove some useless zeroing on skl+ wm calculations



We memset(0) the entire watermark struct the start, so there's no
need to clear things later on.

v2: Rebase due to some stale w/a removal

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181114210729.16185-7-ville.syrjala@linux.intel.com


Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
parent ce110ec3
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+4 −12
Original line number Diff line number Diff line
@@ -4746,10 +4746,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
	if (latency == 0)
		return level == 0 ? -EINVAL : 0;

	if (!intel_wm_plane_visible(cstate, intel_pstate)) {
		result->plane_en = false;
	if (!intel_wm_plane_visible(cstate, intel_pstate))
		return 0;
	}

	/* Display WA #1141: kbl,cfl */
	if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
@@ -4846,8 +4844,6 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
	if ((level > 0 && res_lines > 31) ||
	    res_blocks >= ddb_allocation ||
	    min_disp_buf_needed >= ddb_allocation) {
		result->plane_en = false;

		/*
		 * If there are no valid level 0 watermarks, then we can't
		 * support this display configuration.
@@ -4949,15 +4945,15 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
	uint16_t wm0_sel_res_b, trans_offset_b, res_blocks;

	if (!cstate->base.active)
		goto exit;
		return;

	/* Transition WM are not recommended by HW team for GEN9 */
	if (INTEL_GEN(dev_priv) <= 9)
		goto exit;
		return;

	/* Transition WM don't make any sense if ipc is disabled */
	if (!dev_priv->ipc_enabled)
		goto exit;
		return;

	trans_min = 14;
	if (INTEL_GEN(dev_priv) >= 11)
@@ -4996,11 +4992,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
	if (res_blocks < ddb_allocation) {
		trans_wm->plane_res_b = res_blocks;
		trans_wm->plane_en = true;
		return;
	}

exit:
	trans_wm->plane_en = false;
}

static int __skl_build_plane_wm_single(struct skl_ddb_allocation *ddb,