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Commit 149d6deb authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915: Sanitize PHY state during display core uninit 



To work around a DMC/Punit issue on ICL where the driver's
ICL_PORT_COMP_DW8/IREFGEN PHY setting is lost when entering/exiting DC6
state, make sure to reinit the PHY whenever disabling DC states.
Similarly the driver's PHY/DBUF/CDCLK settings should have been preserved
across DC5/6 transitions, so check this on all platforms.

This gets rid of the following WARN during suspend:
Combo PHY A HW state changed unexpectedly

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190816095523.15800-1-imre.deak@intel.com
parent 2969a78a

drivers/gpu/drm/i915/display/intel_display_power.c

+11 −6
Original line number Diff line number Diff line
@@ -963,8 +963,7 @@ static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv) 
	     "Unexpected DBuf power power state (0x%08x)\n", tmp);

}



static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,

					  struct i915_power_well *power_well)

static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)

{

	struct intel_cdclk_state cdclk_state = {};
@@ -988,6 +987,12 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, 
		intel_combo_phy_init(dev_priv);

}



static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,

					  struct i915_power_well *power_well)

{

	gen9_disable_dc_states(dev_priv);

}



static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,

					   struct i915_power_well *power_well)

{
@@ -4510,7 +4515,7 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv) 
	struct i915_power_domains *power_domains = &dev_priv->power_domains;

	struct i915_power_well *well;



	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);

	gen9_disable_dc_states(dev_priv);



	gen9_dbuf_disable(dev_priv);
@@ -4571,7 +4576,7 @@ static void bxt_display_core_uninit(struct drm_i915_private *dev_priv) 
	struct i915_power_domains *power_domains = &dev_priv->power_domains;

	struct i915_power_well *well;



	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);

	gen9_disable_dc_states(dev_priv);



	gen9_dbuf_disable(dev_priv);
@@ -4631,7 +4636,7 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) 
	struct i915_power_domains *power_domains = &dev_priv->power_domains;

	struct i915_power_well *well;



	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);

	gen9_disable_dc_states(dev_priv);



	/* 1. Disable all display engine functions -> aready done */
@@ -4698,7 +4703,7 @@ static void icl_display_core_uninit(struct drm_i915_private *dev_priv) 
	struct i915_power_domains *power_domains = &dev_priv->power_domains;

	struct i915_power_well *well;



	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);

	gen9_disable_dc_states(dev_priv);



	/* 1. Disable all display engine functions -> aready done */