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Commit 1435f66a authored by Sunil Goutham's avatar Sunil Goutham Committed by David S. Miller
Browse files

octeontx2-af: CGX Rx/Tx enable/disable mbox handlers 



Added new mailbox msgs for RVU PF/VFs to request AF
to enable/disable their mapped CGX::LMAC Rx & Tx.

Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarLinu Cherian <lcherian@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6ca3ee2f

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+18 −0
Original line number Diff line number Diff line
@@ -119,6 +119,24 @@ void *cgx_get_pdata(int cgx_id) 
}

EXPORT_SYMBOL(cgx_get_pdata);



int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable)

{

	struct cgx *cgx = cgxd;

	u64 cfg;



	if (!cgx || lmac_id >= cgx->lmac_count)

		return -ENODEV;



	cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_CFG);

	if (enable)

		cfg |= CMR_EN | DATA_PKT_RX_EN | DATA_PKT_TX_EN;

	else

		cfg &= ~(CMR_EN | DATA_PKT_RX_EN | DATA_PKT_TX_EN);

	cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg);

	return 0;

}

EXPORT_SYMBOL(cgx_lmac_rx_tx_enable);



/* CGX Firmware interface low level support */

static int cgx_fwi_cmd_send(u64 req, u64 *resp, struct lmac *lmac)

{

drivers/net/ethernet/marvell/octeontx2/af/cgx.h

+5 −0
Original line number Diff line number Diff line
@@ -24,6 +24,10 @@ 
#define CGX_OFFSET(x)			((x) * MAX_LMAC_PER_CGX)



/* Registers */

#define CGXX_CMRX_CFG			0x00

#define  CMR_EN					BIT_ULL(55)

#define  DATA_PKT_TX_EN				BIT_ULL(53)

#define  DATA_PKT_RX_EN				BIT_ULL(54)

#define CGXX_CMRX_INT			0x040

#define  FW_CGX_INT				BIT_ULL(1)

#define CGXX_CMRX_INT_ENA_W1S		0x058
@@ -62,4 +66,5 @@ int cgx_get_cgx_cnt(void); 
int cgx_get_lmac_cnt(void *cgxd);

void *cgx_get_pdata(int cgx_id);

int cgx_lmac_evh_register(struct cgx_event_cb *cb, void *cgxd, int lmac_id);

int cgx_lmac_rx_tx_enable(void *cgxd, int lmac_id, bool enable);

#endif /* CGX_H */

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+2 −0
Original line number Diff line number Diff line
@@ -124,6 +124,8 @@ M(ATTACH_RESOURCES, 0x002, rsrc_attach, msg_rsp) \ 
M(DETACH_RESOURCES,	0x003, rsrc_detach, msg_rsp)			\

M(MSIX_OFFSET,		0x004, msg_req, msix_offset_rsp)		\

/* CGX mbox IDs (range 0x200 - 0x3FF) */				\

M(CGX_START_RXTX,	0x200, msg_req, msg_rsp)			\

M(CGX_STOP_RXTX,	0x201, msg_req, msg_rsp)			\

/* NPA mbox IDs (range 0x400 - 0x5FF) */				\

/* SSO/SSOW mbox IDs (range 0x600 - 0x7FF) */				\

/* TIM mbox IDs (range 0x800 - 0x9FF) */				\

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+16 −0
Original line number Diff line number Diff line
@@ -153,6 +153,22 @@ int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc); 
int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);



/* CGX APIs */

static inline bool is_pf_cgxmapped(struct rvu *rvu, u8 pf)

{

	return (pf >= PF_CGXMAP_BASE && pf <= rvu->cgx_mapped_pfs);

}



static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id)

{

	*cgx_id = (map >> 4) & 0xF;

	*lmac_id = (map & 0xF);

}



int rvu_cgx_probe(struct rvu *rvu);

void rvu_cgx_wq_destroy(struct rvu *rvu);

int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);

int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req,

				    struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_STOP_RXTX(struct rvu *rvu, struct msg_req *req,

				   struct msg_rsp *rsp);

#endif /* RVU_H */

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

+32 −0
Original line number Diff line number Diff line
@@ -192,3 +192,35 @@ int rvu_cgx_probe(struct rvu *rvu) 
	cgx_lmac_event_handler_init(rvu);

	return 0;

}



int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)

{

	int pf = rvu_get_pf(pcifunc);

	u8 cgx_id, lmac_id;



	/* This msg is expected only from PFs that are mapped to CGX LMACs,

	 * if received from other PF/VF simply ACK, nothing to do.

	 */

	if ((pcifunc & RVU_PFVF_FUNC_MASK) || !is_pf_cgxmapped(rvu, pf))

		return -ENODEV;



	rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);



	cgx_lmac_rx_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, start);



	return 0;

}



int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req,

				    struct msg_rsp *rsp)

{

	rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, true);

	return 0;

}



int rvu_mbox_handler_CGX_STOP_RXTX(struct rvu *rvu, struct msg_req *req,

				   struct msg_rsp *rsp)

{

	rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, false);

	return 0;

}