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Commit 1406c9f4 authored by Tejas Prajapati's avatar Tejas Prajapati
Browse files

msm: camera: ife: dump bandwidth and clock for cpas and ife



At the time of overflow dump bandwidth and axi clock
information from cpas along with the ife clock and csid clock.
In RDI only use case add a check for rdi_irq_status
mask; if it is not present skip checking which port has
resulted in overflow.

CRs-Fixed: 2764286
Change-Id: I8080d140c34f2ab64f7e56b080a0dab57488336e
Signed-off-by: default avatarTejas Prajapati <tpraja@codeaurora.org>
parent 3f1cf31d
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+31 −12
Original line number Diff line number Diff line
@@ -7347,6 +7347,7 @@ static int cam_ife_hw_mgr_handle_hw_dump_info(
	struct cam_isp_resource_node  *rsrc_node = NULL;
	struct cam_hw_intf            *hw_intf;
	uint32_t i, out_port_id;
	uint64_t dummy_args;
	int rc = 0;

	list_for_each_entry(hw_mgr_res,
@@ -7373,6 +7374,24 @@ static int cam_ife_hw_mgr_handle_hw_dump_info(
		}
	}

	list_for_each_entry(hw_mgr_res,
		&ife_hw_mgr_ctx->res_list_ife_csid, list) {
		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
			if (!hw_mgr_res->hw_res[i])
				continue;
			hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
			if (hw_intf->hw_ops.process_cmd) {
				rc = hw_intf->hw_ops.process_cmd(
					hw_intf->hw_priv,
					CAM_ISP_HW_CMD_CSID_CLOCK_DUMP,
					&dummy_args,
					sizeof(uint64_t));
				if (rc)
					CAM_ERR(CAM_ISP,
						"CSID Clock Dump failed");
			}
		}
	}

	out_port_id = event_info->res_id & 0xFF;
	hw_mgr_res =
@@ -7431,18 +7450,6 @@ static int cam_ife_hw_mgr_handle_hw_err(
	struct cam_ife_hw_event_recovery_data    recovery_data = {0};
	int                                  rc = -EINVAL;

	if (ctx) {
		ife_hw_mgr_ctx =
			(struct cam_ife_hw_mgr_ctx *)ctx;
		if (event_info->res_type ==
			CAM_ISP_RESOURCE_VFE_IN &&
			!ife_hw_mgr_ctx->is_rdi_only_context &&
			event_info->res_id !=
			CAM_ISP_HW_VFE_IN_CAMIF)
			cam_ife_hw_mgr_handle_hw_dump_info(
			ife_hw_mgr_ctx, event_info);
	}

	if (event_info->err_type == CAM_VFE_IRQ_STATUS_VIOLATION)
		error_event_data.error_type = CAM_ISP_HW_ERROR_VIOLATION;
	else if (event_info->res_type == CAM_ISP_RESOURCE_VFE_IN)
@@ -7457,6 +7464,18 @@ static int cam_ife_hw_mgr_handle_hw_err(
		return rc;
	}

	if (ctx) {
		ife_hw_mgr_ctx =
			(struct cam_ife_hw_mgr_ctx *)ctx;
		if (event_info->res_type ==
			CAM_ISP_RESOURCE_VFE_IN &&
			!ife_hw_mgr_ctx->is_rdi_only_context &&
			event_info->res_id !=
			CAM_ISP_HW_VFE_IN_CAMIF)
			cam_ife_hw_mgr_handle_hw_dump_info(
			ife_hw_mgr_ctx, event_info);
	}

	core_idx = event_info->hw_idx;

	if (g_ife_hw_mgr.debug_cfg.enable_recovery)
+16 −0
Original line number Diff line number Diff line
@@ -3971,6 +3971,19 @@ static int cam_ife_csid_set_csid_clock(
	return 0;
}

static int cam_ife_csid_dump_csid_clock(
	struct cam_ife_csid_hw *csid_hw, void *cmd_args)
{
	if (!csid_hw)
		return -EINVAL;

	CAM_INFO(CAM_ISP, "CSID:%d clock rate %llu",
		csid_hw->hw_intf->hw_idx,
		csid_hw->clk_rate);

	return 0;
}

static int cam_ife_csid_set_sensor_dimension(
	struct cam_ife_csid_hw *csid_hw, void *cmd_args)
{
@@ -4203,6 +4216,9 @@ static int cam_ife_csid_process_cmd(void *hw_priv,
	case CAM_ISP_HW_CMD_CSID_CLOCK_UPDATE:
		rc = cam_ife_csid_set_csid_clock(csid_hw, cmd_args);
		break;
	case CAM_ISP_HW_CMD_CSID_CLOCK_DUMP:
		rc = cam_ife_csid_dump_csid_clock(csid_hw, cmd_args);
		break;
	case CAM_ISP_HW_CMD_CSID_QCFA_SUPPORTED:
		rc = cam_ife_csid_set_csid_qcfa(csid_hw, cmd_args);
		break;
+1 −0
Original line number Diff line number Diff line
@@ -125,6 +125,7 @@ enum cam_isp_hw_cmd_type {
	CAM_ISP_HW_CMD_IS_CONSUMED_ADDR_SUPPORT,
	CAM_ISP_HW_CMD_GET_RES_FOR_MID,
	CAM_ISP_HW_CMD_BLANKING_UPDATE,
	CAM_ISP_HW_CMD_CSID_CLOCK_DUMP,
	CAM_ISP_HW_CMD_MAX,
};

+9 −0
Original line number Diff line number Diff line
@@ -87,6 +87,14 @@ static struct cam_vfe_rdi_reg_data vfe17x_rdi_3_data = {
	.reg_update_irq_mask      = 0x100,
};

static struct cam_vfe_rdi_overflow_status vfe17x_rdi_irq_status = {
	.rdi0_overflow_mask = 0x8,
	.rdi1_overflow_mask = 0x10,
	.rdi2_overflow_mask = 0x18,
	.rdi3_overflow_mask = 0x20,
	.rdi_overflow_mask  = 0x3c,
};

static struct cam_vfe_top_ver2_hw_info vfe17x_top_hw_info = {
	.common_reg = &vfe17x_top_common_reg,
	.camif_hw_info = {
@@ -104,6 +112,7 @@ static struct cam_vfe_top_ver2_hw_info vfe17x_top_hw_info = {
			&vfe17x_rdi_2_data,
			&vfe17x_rdi_3_data,
			},
		.rdi_irq_status  = &vfe17x_rdi_irq_status,
		},
	.num_mux = 4,
	.mux_type = {
+12 −1
Original line number Diff line number Diff line
@@ -881,8 +881,13 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status,
		if (status_0 & 0x20000000)
			CAM_INFO(CAM_ISP, "RDI0 OVERFLOW");

		if (status_0 & 0x40000000)
		if (status_0 & 0x40000000) {
			CAM_INFO(CAM_ISP, "PD PIPE OVERFLOW");
			cam_cpas_reg_read(soc_private->cpas_handle,
				CAM_CPAS_REG_CAMNOC, 0x1010, true, &val3);
			CAM_INFO(CAM_ISP, "ife_rdi_Rd: 0x%x", val3);
			cam_cpas_log_votes();
		}
	}

	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && bus_overflow_status) {
@@ -1207,6 +1212,9 @@ static int cam_vfe_camif_lite_handle_irq_bottom_half(

		ret = CAM_VFE_IRQ_STATUS_OVERFLOW;

		CAM_INFO(CAM_ISP, "ife_clk_src:%lld",
			soc_private->ife_clk_src);

		cam_vfe_camif_lite_print_status(irq_status, ret,
			camif_lite_priv);

@@ -1226,6 +1234,9 @@ static int cam_vfe_camif_lite_handle_irq_bottom_half(

		ret = CAM_VFE_IRQ_STATUS_VIOLATION;

		CAM_INFO(CAM_ISP, "ife_clk_src:%lld",
			soc_private->ife_clk_src);

		cam_vfe_camif_lite_print_status(irq_status, ret,
			camif_lite_priv);

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