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Commit 13ed1501 authored by Sugar Zhang's avatar Sugar Zhang Committed by Heiko Stuebner
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arm64: dts: rockchip: add rk3328 pdm node



This patch add pdm controller device node for rk3328.

Signed-off-by: default avatarSugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent ae4fdcca
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+77 −0
Original line number Diff line number Diff line
@@ -249,6 +249,27 @@
		status = "disabled";
	};

	pdm: pdm@ff040000 {
		compatible = "rockchip,pdm";
		reg = <0x0 0xff040000 0x0 0x1000>;
		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
		clock-names = "pdm_clk", "pdm_hclk";
		dmas = <&dmac 16>;
		dma-names = "rx";
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&pdmm0_clk
			     &pdmm0_sdi0
			     &pdmm0_sdi1
			     &pdmm0_sdi2
			     &pdmm0_sdi3>;
		pinctrl-1 = <&pdmm0_clk_sleep
			     &pdmm0_sdi0_sleep
			     &pdmm0_sdi1_sleep
			     &pdmm0_sdi2_sleep
			     &pdmm0_sdi3_sleep>;
		status = "disabled";
	};

	grf: syscon@ff100000 {
		compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
		reg = <0x0 0xff100000 0x0 0x1000>;
@@ -931,6 +952,62 @@
			};
		};

		pdm-0 {
			pdmm0_clk: pdmm0-clk {
				rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>;
			};

			pdmm0_fsync: pdmm0-fsync {
				rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>;
			};

			pdmm0_sdi0: pdmm0-sdi0 {
				rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>;
			};

			pdmm0_sdi1: pdmm0-sdi1 {
				rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>;
			};

			pdmm0_sdi2: pdmm0-sdi2 {
				rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>;
			};

			pdmm0_sdi3: pdmm0-sdi3 {
				rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>;
			};

			pdmm0_clk_sleep: pdmm0-clk-sleep {
				rockchip,pins =
					<2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>;
			};

			pdmm0_sdi0_sleep: pdmm0-sdi0-sleep {
				rockchip,pins =
					<2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>;
			};

			pdmm0_sdi1_sleep: pdmm0-sdi1-sleep {
				rockchip,pins =
					<2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>;
			};

			pdmm0_sdi2_sleep: pdmm0-sdi2-sleep {
				rockchip,pins =
					<2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>;
			};

			pdmm0_sdi3_sleep: pdmm0-sdi3-sleep {
				rockchip,pins =
					<2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
			};

			pdmm0_fsync_sleep: pdmm0-fsync-sleep {
				rockchip,pins =
					<2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
			};
		};

		tsadc {
			otp_gpio: otp-gpio {
				rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;