Merge "disp: msm: sde: intf accept 64-bit compressed pixels" (13c967c3) · Commits · e / devices / android_kernel_fairphone_FP5

msm/sde/sde_encoder_phys_cmd.c

+11 −2

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
		* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
		*/

		#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
		@@ -1102,7 +1102,10 @@ static void _sde_encoder_phys_cmd_pingpong_config(
		static void sde_encoder_phys_cmd_enable_helper(
		struct sde_encoder_phys *phys_enc)
		{
		if (!phys_enc \|\| !phys_enc->hw_ctl \|\| !phys_enc->hw_pp) {
		struct sde_hw_intf *hw_intf;

		if (!phys_enc \|\| !phys_enc->hw_ctl \|\| !phys_enc->hw_pp \|\|
		!phys_enc->hw_intf) {
		SDE_ERROR("invalid arg(s), encoder %d\n", !phys_enc);
		return;
		}
		@@ -1111,6 +1114,12 @@ static void sde_encoder_phys_cmd_enable_helper(

		_sde_encoder_phys_cmd_pingpong_config(phys_enc);

		hw_intf = phys_enc->hw_intf;
		if (hw_intf->ops.enable_compressed_input)
		hw_intf->ops.enable_compressed_input(phys_enc->hw_intf,
		(phys_enc->comp_type !=
		MSM_DISPLAY_COMPRESSION_NONE), false);

		/*
		* For pp-split, skip setting the flush bit for the slave intf, since
		* both intfs use same ctl and HW will only flush the master.

msm/sde/sde_encoder_phys_vid.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -103,7 +103,8 @@ static void drm_mode_to_intf_timing_params(
		timing->underflow_clr = 0xff;
		timing->hsync_skew = mode->hskew;
		timing->v_front_porch_fixed = vid_enc->base.vfp_cached;
		timing->compression_en = false;
		if (vid_enc->base.comp_type != MSM_DISPLAY_COMPRESSION_NONE)
		timing->compression_en = true;

		/* DSI controller cannot handle active-low sync signals. */
		if (phys_enc->hw_intf->cap->type == INTF_DSI) {
		@@ -138,7 +139,6 @@ static void drm_mode_to_intf_timing_params(

		if (vid_enc->base.comp_type == MSM_DISPLAY_COMPRESSION_DSC &&
		(vid_enc->base.comp_ratio > 1)) {
		timing->compression_en = true;
		timing->extra_dto_cycles =
		vid_enc->base.dsc_extra_pclk_cycle_cnt;
		timing->width += vid_enc->base.dsc_extra_disp_width;

msm/sde/sde_hw_intf.c

+39 −1

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
		* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
		*/
		#include <linux/iopoll.h>

		@@ -177,6 +177,16 @@ static void sde_hw_intf_avr_ctrl(struct sde_hw_intf *ctx,
		SDE_REG_WRITE(c, INTF_AVR_MODE, avr_mode);
		}

		static inline void _check_and_set_comp_bit(struct sde_hw_intf *ctx,
		bool dsc_4hs_merge, bool compression_en, u32 *intf_cfg2)
		{
		if (((SDE_HW_MAJOR(ctx->mdss->hwversion) >=
		SDE_HW_MAJOR(SDE_HW_VER_700)) &&
		compression_en) \|\|
		(IS_SDE_MAJOR_SAME(ctx->mdss->hwversion,
		SDE_HW_VER_600) && dsc_4hs_merge))
		(*intf_cfg2) \|= BIT(12);
		}

		static void sde_hw_intf_setup_timing_engine(struct sde_hw_intf *ctx,
		const struct intf_timing_params *p,
		@@ -256,6 +266,9 @@ static void sde_hw_intf_setup_timing_engine(struct sde_hw_intf *ctx,

		intf_cfg2 = 0;

		_check_and_set_comp_bit(ctx, p->dsc_4hs_merge, p->compression_en,
		&intf_cfg2);

		if (dp_intf && p->compression_en) {
		active_data_hctl = (hsync_start_x + p->extra_dto_cycles) << 16;
		active_data_hctl += hsync_start_x;
		@@ -648,6 +661,30 @@ static void sde_hw_intf_vsync_sel(struct sde_hw_intf *intf,
		SDE_REG_WRITE(c, INTF_TEAR_MDP_VSYNC_SEL, (vsync_source & 0xf));
		}

		static void sde_hw_intf_enable_compressed_input(struct sde_hw_intf *intf,
		bool compression_en, bool dsc_4hs_merge)
		{
		struct sde_hw_blk_reg_map *c;
		u32 intf_cfg2;

		if (!intf)
		return;

		/*
		* callers can either call this function to enable/disable the 64 bit
		* compressed input or this configuration can be applied along
		* with timing generation parameters
		*/

		c = &intf->hw;
		intf_cfg2 = SDE_REG_READ(c, INTF_CONFIG2);

		_check_and_set_comp_bit(intf, dsc_4hs_merge, compression_en,
		&intf_cfg2);

		SDE_REG_WRITE(c, INTF_CONFIG2, intf_cfg2);
		}

		static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
		unsigned long cap)
		{
		@@ -661,6 +698,7 @@ static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
		ops->avr_setup = sde_hw_intf_avr_setup;
		ops->avr_trigger = sde_hw_intf_avr_trigger;
		ops->avr_ctrl = sde_hw_intf_avr_ctrl;
		ops->enable_compressed_input = sde_hw_intf_enable_compressed_input;

		if (cap & BIT(SDE_INTF_INPUT_CTRL))
		ops->bind_pingpong_blk = sde_hw_intf_bind_pingpong_blk;

msm/sde/sde_hw_intf.h

+9 −2

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
		* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
		*/

		#ifndef _SDE_HW_INTF_H
		@@ -34,8 +34,9 @@ struct intf_timing_params {
		u32 hsync_skew;
		u32 v_front_porch_fixed;
		bool wide_bus_en; /* for DP only */
		bool compression_en; /* for DP only */
		bool compression_en;
		u32 extra_dto_cycles; /* for DP only */
		bool dsc_4hs_merge; /* DSC 4HS merge */
		};

		struct intf_prog_fetch {
		@@ -177,6 +178,12 @@ struct sde_hw_intf_ops {
		*/
		void (avr_ctrl)(struct sde_hw_intf intf,
		const struct intf_avr_params *avr_params);

		/**
		* Enable/disable 64 bit compressed data input to interface block
		*/
		void (enable_compressed_input)(struct sde_hw_intf intf,
		bool compression_en, bool dsc_4hs_merge);
		};

		struct sde_hw_intf {