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Commit 13ab1b44 authored by Yongqiang Sun's avatar Yongqiang Sun Committed by Alex Deucher
Browse files

drm/amd/display: Fixed extend to second screen mode hang 



	1. Fixed acquire free split pipe bug.
	2. Change return value for dc_add_stream_to_ctx
	   from bool to enum.
	4. Remove redundant apply_ctx_for_surface calling
	5. Unlock pipe after back end programming.

Signed-off-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3af89b96

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+2 −2
Original line number Diff line number Diff line
@@ -4495,10 +4495,10 @@ static int dm_update_crtcs_state(struct dc *dc, 
				DRM_DEBUG_DRIVER("Enabling DRM crtc: %d\n",

							crtc->base.id);



				if (!dc_add_stream_to_ctx(

				if (dc_add_stream_to_ctx(

						dc,

						dm_state->context,

						dm_new_crtc_state->stream)) {

						dm_new_crtc_state->stream) != DC_OK) {

					ret = -EINVAL;

					goto fail;

				}

drivers/gpu/drm/amd/display/dc/core/dc.c

+25 −23
Original line number Diff line number Diff line
@@ -766,7 +766,6 @@ static bool dc_commit_state_no_check(struct dc *dc, struct dc_state *context) 
	for (i = 0; i < context->stream_count; i++) {

		const struct dc_sink *sink = context->streams[i]->sink;



		for (j = 0; j < context->stream_status[i].plane_count; j++) {

		dc->hwss.apply_ctx_for_surface(

				dc, context->streams[i],

				context->stream_status[i].plane_count,
@@ -786,14 +785,8 @@ static bool dc_commit_state_no_check(struct dc *dc, struct dc_state *context) 
					dc->hwss.setup_stereo(pipe, dc);

			}

		}

		}



		for (j = 0; j < MAX_PIPES; j++) {

			pipe = &context->res_ctx.pipe_ctx[j];



			if (!pipe->top_pipe && pipe->stream == context->streams[i])

				dc->hwss.pipe_control_lock(dc, pipe, false);

		}



		CONN_MSG_MODE(sink->link, "{%dx%d, %dx%d@%dKhz}",

				context->streams[i]->timing.h_addressable,
@@ -815,6 +808,15 @@ static bool dc_commit_state_no_check(struct dc *dc, struct dc_state *context) 


	dc_enable_stereo(dc, context, dc_streams, context->stream_count);



	for (i = 0; i < context->stream_count; i++) {

		for (j = 0; j < MAX_PIPES; j++) {

			pipe = &context->res_ctx.pipe_ctx[j];



			if (!pipe->top_pipe && pipe->stream == context->streams[i])

				dc->hwss.pipe_control_lock(dc, pipe, false);

		}

	}



	dc_release_state(dc->current_state);



	dc->current_state = context;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+4 −5
Original line number Diff line number Diff line
@@ -1446,7 +1446,7 @@ bool resource_is_stream_unchanged( 
	return false;

}



bool dc_add_stream_to_ctx(

enum dc_status dc_add_stream_to_ctx(

		struct dc *dc,

		struct dc_state *new_ctx,

		struct dc_stream_state *stream)
@@ -1467,7 +1467,7 @@ bool dc_add_stream_to_ctx( 
	if (res != DC_OK)

		DC_ERROR("Adding stream %p to context failed with err %d!\n", stream, res);



	return res == DC_OK;

	return res;

}



bool dc_remove_stream_from_ctx(
@@ -1640,10 +1640,9 @@ enum dc_status resource_map_pool_resources( 
	/* acquire new resources */

	pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream);



#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

	if (pipe_idx < 0)

		acquire_first_split_pipe(&context->res_ctx, pool, stream);

#endif

		pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream);



	if (pipe_idx < 0)

		return DC_NO_CONTROLLER_RESOURCE;

drivers/gpu/drm/amd/display/dc/dc.h

+1 −1
Original line number Diff line number Diff line
@@ -631,7 +631,7 @@ bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 
				  uint32_t *h_position,

				  uint32_t *v_position);



bool dc_add_stream_to_ctx(

enum dc_status dc_add_stream_to_ctx(

			struct dc *dc,

		struct dc_state *new_ctx,

		struct dc_stream_state *stream);