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Commit 1357dfd7 authored by Liming Sun's avatar Liming Sun Committed by Andy Shevchenko
Browse files

platform/mellanox: Add TmFifo driver for Mellanox BlueField Soc 



This commit adds the TmFifo platform driver for Mellanox BlueField
Soc. TmFifo is a shared FIFO which enables external host machine
to exchange data with the SoC via USB or PCIe. The driver is based
on virtio framework and has console and network access enabled.

Reviewed-by: default avatarVadim Pasternak <vadimp@mellanox.com>
Signed-off-by: default avatarLiming Sun <lsun@mellanox.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent d33a7e57

drivers/platform/mellanox/Kconfig

+11 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 


menuconfig MELLANOX_PLATFORM

	bool "Platform support for Mellanox hardware"

	depends on X86 || ARM || COMPILE_TEST

	depends on X86 || ARM || ARM64 || COMPILE_TEST

	---help---

	  Say Y here to get to see options for platform support for

	  Mellanox systems. This option alone does not add any kernel code.
@@ -34,4 +34,14 @@ config MLXREG_IO 
	  to system resets operation, system reset causes monitoring and some

	  kinds of mux selection.



config MLXBF_TMFIFO

	tristate "Mellanox BlueField SoC TmFifo platform driver"

	depends on ARM64

	depends on ACPI

	depends on VIRTIO_CONSOLE && VIRTIO_NET

	help

	  Say y here to enable TmFifo support. The TmFifo driver provides

          platform driver support for the TmFifo which supports console

          and networking based on the virtio framework.



endif # MELLANOX_PLATFORM

drivers/platform/mellanox/Makefile

+1 −0
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@@ -3,5 +3,6 @@ 
# Makefile for linux/drivers/platform/mellanox

# Mellanox Platform-Specific Drivers

#

obj-$(CONFIG_MLXBF_TMFIFO)	+= mlxbf-tmfifo.o

obj-$(CONFIG_MLXREG_HOTPLUG)	+= mlxreg-hotplug.o

obj-$(CONFIG_MLXREG_IO) += mlxreg-io.o

drivers/platform/mellanox/mlxbf-tmfifo-regs.h

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/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (c) 2019, Mellanox Technologies. All rights reserved.

 */



#ifndef __MLXBF_TMFIFO_REGS_H__

#define __MLXBF_TMFIFO_REGS_H__



#include <linux/types.h>

#include <linux/bits.h>



#define MLXBF_TMFIFO_TX_DATA				0x00

#define MLXBF_TMFIFO_TX_STS				0x08

#define MLXBF_TMFIFO_TX_STS__LENGTH			0x0001

#define MLXBF_TMFIFO_TX_STS__COUNT_SHIFT		0

#define MLXBF_TMFIFO_TX_STS__COUNT_WIDTH		9

#define MLXBF_TMFIFO_TX_STS__COUNT_RESET_VAL		0

#define MLXBF_TMFIFO_TX_STS__COUNT_RMASK		GENMASK_ULL(8, 0)

#define MLXBF_TMFIFO_TX_STS__COUNT_MASK			GENMASK_ULL(8, 0)

#define MLXBF_TMFIFO_TX_CTL				0x10

#define MLXBF_TMFIFO_TX_CTL__LENGTH			0x0001

#define MLXBF_TMFIFO_TX_CTL__LWM_SHIFT			0

#define MLXBF_TMFIFO_TX_CTL__LWM_WIDTH			8

#define MLXBF_TMFIFO_TX_CTL__LWM_RESET_VAL		128

#define MLXBF_TMFIFO_TX_CTL__LWM_RMASK			GENMASK_ULL(7, 0)

#define MLXBF_TMFIFO_TX_CTL__LWM_MASK			GENMASK_ULL(7, 0)

#define MLXBF_TMFIFO_TX_CTL__HWM_SHIFT			8

#define MLXBF_TMFIFO_TX_CTL__HWM_WIDTH			8

#define MLXBF_TMFIFO_TX_CTL__HWM_RESET_VAL		128

#define MLXBF_TMFIFO_TX_CTL__HWM_RMASK			GENMASK_ULL(7, 0)

#define MLXBF_TMFIFO_TX_CTL__HWM_MASK			GENMASK_ULL(15, 8)

#define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_SHIFT		32

#define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_WIDTH		9

#define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_RESET_VAL	256

#define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_RMASK		GENMASK_ULL(8, 0)

#define MLXBF_TMFIFO_TX_CTL__MAX_ENTRIES_MASK		GENMASK_ULL(40, 32)

#define MLXBF_TMFIFO_RX_DATA				0x00

#define MLXBF_TMFIFO_RX_STS				0x08

#define MLXBF_TMFIFO_RX_STS__LENGTH			0x0001

#define MLXBF_TMFIFO_RX_STS__COUNT_SHIFT		0

#define MLXBF_TMFIFO_RX_STS__COUNT_WIDTH		9

#define MLXBF_TMFIFO_RX_STS__COUNT_RESET_VAL		0

#define MLXBF_TMFIFO_RX_STS__COUNT_RMASK		GENMASK_ULL(8, 0)

#define MLXBF_TMFIFO_RX_STS__COUNT_MASK			GENMASK_ULL(8, 0)

#define MLXBF_TMFIFO_RX_CTL				0x10

#define MLXBF_TMFIFO_RX_CTL__LENGTH			0x0001

#define MLXBF_TMFIFO_RX_CTL__LWM_SHIFT			0

#define MLXBF_TMFIFO_RX_CTL__LWM_WIDTH			8

#define MLXBF_TMFIFO_RX_CTL__LWM_RESET_VAL		128

#define MLXBF_TMFIFO_RX_CTL__LWM_RMASK			GENMASK_ULL(7, 0)

#define MLXBF_TMFIFO_RX_CTL__LWM_MASK			GENMASK_ULL(7, 0)

#define MLXBF_TMFIFO_RX_CTL__HWM_SHIFT			8

#define MLXBF_TMFIFO_RX_CTL__HWM_WIDTH			8

#define MLXBF_TMFIFO_RX_CTL__HWM_RESET_VAL		128

#define MLXBF_TMFIFO_RX_CTL__HWM_RMASK			GENMASK_ULL(7, 0)

#define MLXBF_TMFIFO_RX_CTL__HWM_MASK			GENMASK_ULL(15, 8)

#define MLXBF_TMFIFO_RX_CTL__MAX_ENTRIES_SHIFT		32

#define MLXBF_TMFIFO_RX_CTL__MAX_ENTRIES_WIDTH		9

#define MLXBF_TMFIFO_RX_CTL__MAX_ENTRIES_RESET_VAL	256

#define MLXBF_TMFIFO_RX_CTL__MAX_ENTRIES_RMASK		GENMASK_ULL(8, 0)

#define MLXBF_TMFIFO_RX_CTL__MAX_ENTRIES_MASK		GENMASK_ULL(40, 32)



#endif /* !defined(__MLXBF_TMFIFO_REGS_H__) */

drivers/platform/mellanox/mlxbf-tmfifo.c

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