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Commit 1351fca9 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: qcom: Update limit-rate and add limit-phy-submode on Lahaina"

parents 32f90919 ddb0ceb6
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+4 −1
Original line number Diff line number Diff line
@@ -35,7 +35,10 @@ Optional properties:
- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
- resets : specifies the PHY reset in the UFS controller
- limit-rate : specifies if the rate has to be limited to A or B.
	       1 = rate B, 0 = rate A.
	       1 = rate A, 2 = rate B.
- limit-phy-submode : specifies the PHY submode which is used for PHY calibration,
		      0 = non-G4, 1 = G4.

Example:

	ufsphy1: ufsphy@fc597000 {
+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@
&ufshc_mem {
	limit-tx-hs-gear = <1>;
	limit-rx-hs-gear = <1>;
	limit-rate = <1>;
	limit-rate = <2>; /* HS Rate-B */

	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
	vdd-hba-fixed-regulator;
+1 −0
Original line number Diff line number Diff line
@@ -1422,6 +1422,7 @@
		phys = <&ufsphy_mem>;
		phy-names = "ufsphy";
		lanes-per-direction = <2>;
		limit-rate = <1>; /* HS Rate-A */
		dev-ref-clk-freq = <0>; /* 19.2 MHz */

		clock-names =