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Commit 13311b00 authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville
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ath5k: use bit shift operators for cache line size 



This matches ath9k, providing consistency when reading both drivers.

Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent aeb63cfd

drivers/net/wireless/ath/ath5k/base.c

+2 −2
Original line number Diff line number Diff line
@@ -471,7 +471,7 @@ ath5k_pci_probe(struct pci_dev *pdev, 
		 * DMA to work so force a reasonable value here if it

		 * comes up zero.

		 */

		csz = L1_CACHE_BYTES / sizeof(u32);

		csz = L1_CACHE_BYTES >> 2;

		pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);

	}

	/*
@@ -544,7 +544,7 @@ ath5k_pci_probe(struct pci_dev *pdev, 
	__set_bit(ATH_STAT_INVALID, sc->status);



	sc->iobase = mem; /* So we can unmap it on detach */

	sc->common.cachelsz = csz * sizeof(u32); /* convert to bytes */

	sc->common.cachelsz = csz << 2; /* convert to bytes */

	sc->opmode = NL80211_IFTYPE_STATION;

	sc->bintval = 1000;

	mutex_init(&sc->lock);