Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 131f7340 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 

* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/radeon/kms: setup MC/VRAM the same way for suspend/resume
  drm/radeon/kms: Fix caching mode selection for GTT object
parents 3440625d 17332925

drivers/gpu/drm/radeon/radeon_device.c

+3 −1
Original line number Diff line number Diff line
@@ -152,7 +152,9 @@ int radeon_mc_setup(struct radeon_device *rdev) 
		}

	} else {

		rdev->mc.vram_location = 0;

		rdev->mc.gtt_location = rdev->mc.mc_vram_size;

		tmp = rdev->mc.mc_vram_size;

		tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1);

		rdev->mc.gtt_location = tmp;

	}

	DRM_INFO("radeon: VRAM %uM\n", rdev->mc.real_vram_size >> 20);

	DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n",

drivers/gpu/drm/radeon/radeon_object.c

+1 −1
Original line number Diff line number Diff line
@@ -106,7 +106,7 @@ static inline uint32_t radeon_object_flags_from_domain(uint32_t domain) 
		flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;

	}

	if (domain & RADEON_GEM_DOMAIN_GTT) {

		flags |= TTM_PL_FLAG_TT | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;

		flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;

	}

	if (domain & RADEON_GEM_DOMAIN_CPU) {

		flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;