Loading fw/htc_services.h +5 −2 Original line number Diff line number Diff line /* * Copyright (c) 2012, 2014-2017, 2020 The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -61,7 +61,10 @@ typedef enum { #define WMI_CONTROL_SVC_WMAC2 MAKE_SERVICE_ID(WMI_SERVICE_GROUP,6) #define WMI_CONTROL_DIAG_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,7) #define WMI_CONTROL_DBR_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,8) #define WMI_MAX_SERVICES 9 /* WMI_CONTROL_SVC_WMAC3,4: WMI service for MACs 3 and 4 (where applicable) */ #define WMI_CONTROL_SVC_WMAC3 MAKE_SERVICE_ID(WMI_SERVICE_GROUP,9) #define WMI_CONTROL_SVC_WMAC4 MAKE_SERVICE_ID(WMI_SERVICE_GROUP,10) #define WMI_MAX_SERVICES 11 #define NMI_CONTROL_SVC MAKE_SERVICE_ID(NMI_SERVICE_GROUP,0) #define NMI_DATA_SVC MAKE_SERVICE_ID(NMI_SERVICE_GROUP,1) Loading fw/htt.h +23 −1 Original line number Diff line number Diff line Loading @@ -802,6 +802,7 @@ typedef enum { HTT_STATS_MLO_UMAC_SSR_DBG_TAG = 184, /* htt_mlo_umac_ssr_dbg_tlv */ HTT_STATS_MLO_UMAC_SSR_HANDSHAKE_TAG = 185, /* htt_mlo_umac_htt_handshake_stats_tlv */ HTT_STATS_MLO_UMAC_SSR_MLO_TAG = 186, /* htt_mlo_umac_ssr_mlo_stats_tlv */ HTT_STATS_PDEV_TDMA_TAG = 187, /* htt_pdev_tdma_stats_tlv */ HTT_STATS_MAX_TAG, Loading Loading @@ -21283,7 +21284,17 @@ struct htt_t2h_rx_data_msdu_info A_UINT32 /* word 1 */ buffer_addr_high : 8, sw_buffer_cookie : 21, rsvd1 : 3; /* fw_offloads_inspected: * When reo_destination_indication is 6 in reo_entrance_ring * of the RXDMA2REO MPDU upload, all the MSDUs that are part * of the MPDU are inspected by FW offloads layer, subsequently * the MSDUs are qualified to be host interested. * In such case the fw_offloads_inspected is set to 1, else 0. * This will assist host to not consider such MSDUs for FISA * flow addition. */ fw_offloads_inspected : 1, rsvd1 : 2; A_UINT32 /* word 2 */ mpdu_retry_bit : 1, /* used for stats maintenance */ raw_mpdu_frame : 1, /* used for pkt drop and processing */ Loading Loading @@ -21404,6 +21415,17 @@ struct htt_t2h_rx_data_msdu_info #define HTT_RX_DATA_MSDU_INFO_SW_BUFFER_COOKIE_GET(word) \ (((word) & HTT_RX_DATA_MSDU_INFO_SW_BUFFER_COOKIE_M) >> HTT_RX_DATA_MSDU_INFO_SW_BUFFER_COOKIE_S) #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_M 0x20000000 #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_S 29 #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_SET(word, value) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED, value); \ (word) |= (value) << HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_S; \ } while (0) #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_GET(word) \ (((word) & HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_M) >> HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_S) #define HTT_RX_DATA_MSDU_INFO_MPDU_RETRY_BIT_M 0x00000001 #define HTT_RX_DATA_MSDU_INFO_MPDU_RETRY_BIT_S 0 fw/htt_stats.h +61 −4 Original line number Diff line number Diff line Loading @@ -538,6 +538,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_MLO_UMAC_SSR_STATS = 56, /** HTT_DBG_PDEV_TDMA_STATS * PARAMS: * - No Params * RESP MSG: * - htt_pdev_tdma_stats_tlv */ HTT_DBG_PDEV_TDMA_STATS = 57, /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, Loading Loading @@ -6578,14 +6586,25 @@ typedef struct { A_UINT32 cv_buf_received; /** total times CV bufs fed back to the IPC ring */ A_UINT32 cv_buf_fed_back; /* Total times CV query happened for IBF case */ /** Total times CV query happened for IBF case */ A_UINT32 cv_total_query_ibf; /* A valid CV has been found for IBF case */ /** A valid CV has been found for IBF case */ A_UINT32 cv_found_ibf; /* A valid CV has not been found for IBF case */ /** A valid CV has not been found for IBF case */ A_UINT32 cv_not_found_ibf; /* Expired CV found during query for IBF case */ /** Expired CV found during query for IBF case */ A_UINT32 cv_expired_during_query_ibf; /** Total number of times adaptive sounding logic has been queried */ A_UINT32 adaptive_snd_total_query; /** * Total number of times adaptive sounding mcs drop has been computed * and recorded. */ A_UINT32 adaptive_snd_total_mcs_drop[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS]; /** Total number of times adaptive sounding logic kicked in */ A_UINT32 adaptive_snd_kicked_in; /** Total number of times we switched back to normal sounding interval */ A_UINT32 adaptive_snd_back_to_default; } htt_tx_sounding_stats_tlv; /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO Loading Loading @@ -8749,6 +8768,44 @@ typedef struct { A_UINT32 ul_mumimo_trigger_within_bss; } htt_pdev_mbssid_ctrl_frame_stats_tlv; typedef struct { htt_tlv_hdr_t tlv_hdr; /** * BIT [ 7 : 0] :- mac_id * Use the HTT_STATS_TDMA_MAC_ID_GET macro to extract * this bitfield. * BIT [31 : 8] :- reserved */ union { struct { A_UINT32 mac_id: 8, reserved: 24; }; A_UINT32 mac_id__word; }; /** Num of Active TDMA schedules */ A_UINT32 num_tdma_active_schedules; /** Num of Reserved TDMA schedules */ A_UINT32 num_tdma_reserved_schedules; /** Num of Restricted TDMA schedules */ A_UINT32 num_tdma_restricted_schedules; /** Num of Unconfigured TDMA schedules */ A_UINT32 num_tdma_unconfigured_schedules; /** Num of TDMA slot switches */ A_UINT32 num_tdma_slot_switches; /** Num of TDMA EDCA switches */ A_UINT32 num_tdma_edca_switches; } htt_pdev_tdma_stats_tlv; #define HTT_STATS_TDMA_MAC_ID_M 0x000000ff #define HTT_STATS_TDMA_MAC_ID_S 0 #define HTT_STATS_TDMA_MAC_ID_GET(_var) \ (((_var) & HTT_STATS_TDMA_MAC_ID_M) >> \ HTT_STATS_TDMA_MAC_ID_S) /*======= Bandwidth Manager stats ====================*/ #define HTT_BW_MGR_STATS_MAC_ID_M 0x000000ff Loading fw/wlan_defs.h +13 −0 Original line number Diff line number Diff line Loading @@ -1747,8 +1747,15 @@ A_COMPILE_TIME_ASSERT(check_mlo_glb_link_info_8byte_size_quantum, typedef enum { MLO_SHMEM_CRASH_PARTNER_CHIPS = 1, MLO_SHMEM_CRASH_SW_PANIC = 2, MLO_SHMEM_CRASH_SW_ASSERT = 3, } MLO_SHMEM_CHIP_CRASH_REASON; typedef enum { MLO_SHMEM_RECOVERY_CRASH_PARTNER_CHIPS = 1, MLO_SHMEM_RECOVER_NON_MLO_MODE = 2, } MLO_SHMEM_CHIP_RECOVERY_MODE; /* glb link info structures used for scratchpad memory (crash and recovery) */ typedef struct { /* TLV tag and len; tag equals MLO_SHMEM_TLV_STRUCT_MLO_GLB_PER_CHIP_CRASH_INFO */ Loading @@ -1757,6 +1764,12 @@ typedef struct { * crash reason, takes value in enum MLO_SHMEM_CHIP_CRASH_REASON */ A_UINT32 crash_reason; /** * crash reason, takes value in enum MLO_SHMEM_CHIP_RECOVERY_MODE */ A_UINT32 recovery_mode; /* reserved: added for padding to A_UINT64 size, available for future use */ A_UINT32 reserved; } mlo_glb_per_chip_crash_info; A_COMPILE_TIME_ASSERT(check_mlo_glb_per_chip_crash_info, Loading fw/wlan_module_ids.h +2 −0 Original line number Diff line number Diff line /* * Copyright (c) 2011-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -152,6 +153,7 @@ typedef enum { WLAN_MODULE_BAR, /* 0x70 */ WLAN_MODULE_SMART_TX, /* 0x71 */ WLAN_MODULE_BRIDGE_PEER, /* 0x72 */ WLAN_MODULE_AUX_MAC_MGR, /* 0x73 */ WLAN_MODULE_ID_MAX, Loading Loading
fw/htc_services.h +5 −2 Original line number Diff line number Diff line /* * Copyright (c) 2012, 2014-2017, 2020 The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -61,7 +61,10 @@ typedef enum { #define WMI_CONTROL_SVC_WMAC2 MAKE_SERVICE_ID(WMI_SERVICE_GROUP,6) #define WMI_CONTROL_DIAG_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,7) #define WMI_CONTROL_DBR_SVC MAKE_SERVICE_ID(WMI_SERVICE_GROUP,8) #define WMI_MAX_SERVICES 9 /* WMI_CONTROL_SVC_WMAC3,4: WMI service for MACs 3 and 4 (where applicable) */ #define WMI_CONTROL_SVC_WMAC3 MAKE_SERVICE_ID(WMI_SERVICE_GROUP,9) #define WMI_CONTROL_SVC_WMAC4 MAKE_SERVICE_ID(WMI_SERVICE_GROUP,10) #define WMI_MAX_SERVICES 11 #define NMI_CONTROL_SVC MAKE_SERVICE_ID(NMI_SERVICE_GROUP,0) #define NMI_DATA_SVC MAKE_SERVICE_ID(NMI_SERVICE_GROUP,1) Loading
fw/htt.h +23 −1 Original line number Diff line number Diff line Loading @@ -802,6 +802,7 @@ typedef enum { HTT_STATS_MLO_UMAC_SSR_DBG_TAG = 184, /* htt_mlo_umac_ssr_dbg_tlv */ HTT_STATS_MLO_UMAC_SSR_HANDSHAKE_TAG = 185, /* htt_mlo_umac_htt_handshake_stats_tlv */ HTT_STATS_MLO_UMAC_SSR_MLO_TAG = 186, /* htt_mlo_umac_ssr_mlo_stats_tlv */ HTT_STATS_PDEV_TDMA_TAG = 187, /* htt_pdev_tdma_stats_tlv */ HTT_STATS_MAX_TAG, Loading Loading @@ -21283,7 +21284,17 @@ struct htt_t2h_rx_data_msdu_info A_UINT32 /* word 1 */ buffer_addr_high : 8, sw_buffer_cookie : 21, rsvd1 : 3; /* fw_offloads_inspected: * When reo_destination_indication is 6 in reo_entrance_ring * of the RXDMA2REO MPDU upload, all the MSDUs that are part * of the MPDU are inspected by FW offloads layer, subsequently * the MSDUs are qualified to be host interested. * In such case the fw_offloads_inspected is set to 1, else 0. * This will assist host to not consider such MSDUs for FISA * flow addition. */ fw_offloads_inspected : 1, rsvd1 : 2; A_UINT32 /* word 2 */ mpdu_retry_bit : 1, /* used for stats maintenance */ raw_mpdu_frame : 1, /* used for pkt drop and processing */ Loading Loading @@ -21404,6 +21415,17 @@ struct htt_t2h_rx_data_msdu_info #define HTT_RX_DATA_MSDU_INFO_SW_BUFFER_COOKIE_GET(word) \ (((word) & HTT_RX_DATA_MSDU_INFO_SW_BUFFER_COOKIE_M) >> HTT_RX_DATA_MSDU_INFO_SW_BUFFER_COOKIE_S) #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_M 0x20000000 #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_S 29 #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_SET(word, value) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED, value); \ (word) |= (value) << HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_S; \ } while (0) #define HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_GET(word) \ (((word) & HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_M) >> HTT_RX_DATA_MSDU_INFO_FW_OFFLOADS_INSPECTED_S) #define HTT_RX_DATA_MSDU_INFO_MPDU_RETRY_BIT_M 0x00000001 #define HTT_RX_DATA_MSDU_INFO_MPDU_RETRY_BIT_S 0
fw/htt_stats.h +61 −4 Original line number Diff line number Diff line Loading @@ -538,6 +538,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_MLO_UMAC_SSR_STATS = 56, /** HTT_DBG_PDEV_TDMA_STATS * PARAMS: * - No Params * RESP MSG: * - htt_pdev_tdma_stats_tlv */ HTT_DBG_PDEV_TDMA_STATS = 57, /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, Loading Loading @@ -6578,14 +6586,25 @@ typedef struct { A_UINT32 cv_buf_received; /** total times CV bufs fed back to the IPC ring */ A_UINT32 cv_buf_fed_back; /* Total times CV query happened for IBF case */ /** Total times CV query happened for IBF case */ A_UINT32 cv_total_query_ibf; /* A valid CV has been found for IBF case */ /** A valid CV has been found for IBF case */ A_UINT32 cv_found_ibf; /* A valid CV has not been found for IBF case */ /** A valid CV has not been found for IBF case */ A_UINT32 cv_not_found_ibf; /* Expired CV found during query for IBF case */ /** Expired CV found during query for IBF case */ A_UINT32 cv_expired_during_query_ibf; /** Total number of times adaptive sounding logic has been queried */ A_UINT32 adaptive_snd_total_query; /** * Total number of times adaptive sounding mcs drop has been computed * and recorded. */ A_UINT32 adaptive_snd_total_mcs_drop[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS]; /** Total number of times adaptive sounding logic kicked in */ A_UINT32 adaptive_snd_kicked_in; /** Total number of times we switched back to normal sounding interval */ A_UINT32 adaptive_snd_back_to_default; } htt_tx_sounding_stats_tlv; /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO Loading Loading @@ -8749,6 +8768,44 @@ typedef struct { A_UINT32 ul_mumimo_trigger_within_bss; } htt_pdev_mbssid_ctrl_frame_stats_tlv; typedef struct { htt_tlv_hdr_t tlv_hdr; /** * BIT [ 7 : 0] :- mac_id * Use the HTT_STATS_TDMA_MAC_ID_GET macro to extract * this bitfield. * BIT [31 : 8] :- reserved */ union { struct { A_UINT32 mac_id: 8, reserved: 24; }; A_UINT32 mac_id__word; }; /** Num of Active TDMA schedules */ A_UINT32 num_tdma_active_schedules; /** Num of Reserved TDMA schedules */ A_UINT32 num_tdma_reserved_schedules; /** Num of Restricted TDMA schedules */ A_UINT32 num_tdma_restricted_schedules; /** Num of Unconfigured TDMA schedules */ A_UINT32 num_tdma_unconfigured_schedules; /** Num of TDMA slot switches */ A_UINT32 num_tdma_slot_switches; /** Num of TDMA EDCA switches */ A_UINT32 num_tdma_edca_switches; } htt_pdev_tdma_stats_tlv; #define HTT_STATS_TDMA_MAC_ID_M 0x000000ff #define HTT_STATS_TDMA_MAC_ID_S 0 #define HTT_STATS_TDMA_MAC_ID_GET(_var) \ (((_var) & HTT_STATS_TDMA_MAC_ID_M) >> \ HTT_STATS_TDMA_MAC_ID_S) /*======= Bandwidth Manager stats ====================*/ #define HTT_BW_MGR_STATS_MAC_ID_M 0x000000ff Loading
fw/wlan_defs.h +13 −0 Original line number Diff line number Diff line Loading @@ -1747,8 +1747,15 @@ A_COMPILE_TIME_ASSERT(check_mlo_glb_link_info_8byte_size_quantum, typedef enum { MLO_SHMEM_CRASH_PARTNER_CHIPS = 1, MLO_SHMEM_CRASH_SW_PANIC = 2, MLO_SHMEM_CRASH_SW_ASSERT = 3, } MLO_SHMEM_CHIP_CRASH_REASON; typedef enum { MLO_SHMEM_RECOVERY_CRASH_PARTNER_CHIPS = 1, MLO_SHMEM_RECOVER_NON_MLO_MODE = 2, } MLO_SHMEM_CHIP_RECOVERY_MODE; /* glb link info structures used for scratchpad memory (crash and recovery) */ typedef struct { /* TLV tag and len; tag equals MLO_SHMEM_TLV_STRUCT_MLO_GLB_PER_CHIP_CRASH_INFO */ Loading @@ -1757,6 +1764,12 @@ typedef struct { * crash reason, takes value in enum MLO_SHMEM_CHIP_CRASH_REASON */ A_UINT32 crash_reason; /** * crash reason, takes value in enum MLO_SHMEM_CHIP_RECOVERY_MODE */ A_UINT32 recovery_mode; /* reserved: added for padding to A_UINT64 size, available for future use */ A_UINT32 reserved; } mlo_glb_per_chip_crash_info; A_COMPILE_TIME_ASSERT(check_mlo_glb_per_chip_crash_info, Loading
fw/wlan_module_ids.h +2 −0 Original line number Diff line number Diff line /* * Copyright (c) 2011-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -152,6 +153,7 @@ typedef enum { WLAN_MODULE_BAR, /* 0x70 */ WLAN_MODULE_SMART_TX, /* 0x71 */ WLAN_MODULE_BRIDGE_PEER, /* 0x72 */ WLAN_MODULE_AUX_MAC_MGR, /* 0x73 */ WLAN_MODULE_ID_MAX, Loading