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Commit 11a7bea1 authored by Jerome Brunet's avatar Jerome Brunet Committed by Kevin Hilman
Browse files

arm64: dts: meson: g12a: add pinctrl support controllers 



Add the peripheral and always-on pinctrl controllers to the g12a soc.

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent b019f4a4

arch/arm64/boot/dts/amlogic/meson-g12a.dtsi

+42 −0
Original line number Original line Diff line number Diff line
@@ -104,6 +104,29 @@ 
				#address-cells = <2>;

				#address-cells = <2>;

				#size-cells = <2>;

				#size-cells = <2>;

				ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;

				ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;



				periphs_pinctrl: pinctrl@40 {

					compatible = "amlogic,meson-g12a-periphs-pinctrl";

					#address-cells = <2>;

					#size-cells = <2>;

					ranges;



					gpio: bank@40 {

						reg = <0x0 0x40  0x0 0x4c>,

						      <0x0 0xe8  0x0 0x18>,

						      <0x0 0x120 0x0 0x18>,

						      <0x0 0x2c0 0x0 0x40>,

						      <0x0 0x340 0x0 0x1c>;

						reg-names = "gpio",

							    "pull",

							    "pull-enable",

							    "mux",

							    "ds";

						gpio-controller;

						#gpio-cells = <2>;

						gpio-ranges = <&periphs_pinctrl 0 0 86>;

					};

				};

			};

			};





			hiu: bus@3c000 {

			hiu: bus@3c000 {
@@ -150,6 +173,25 @@ 
					clocks = <&xtal>, <&clkc CLKID_CLK81>;

					clocks = <&xtal>, <&clkc CLKID_CLK81>;

					clock-names = "xtal", "mpeg-clk";

					clock-names = "xtal", "mpeg-clk";

				};

				};



				ao_pinctrl: pinctrl@14 {

					compatible = "amlogic,meson-g12a-aobus-pinctrl";

					#address-cells = <2>;

					#size-cells = <2>;

					ranges;



					gpio_ao: bank@14 {

						reg = <0x0 0x14 0x0 0x8>,

						      <0x0 0x1c 0x0 0x8>,

						      <0x0 0x24 0x0 0x14>;

						reg-names = "mux",

							    "ds",

							    "gpio";

						gpio-controller;

						#gpio-cells = <2>;

						gpio-ranges = <&ao_pinctrl 0 0 15>;

					};

				};

			};

			};





			sec_AO: ao-secure@140 {

			sec_AO: ao-secure@140 {