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Commit 11817aa6 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-Add-support-for-physical-hardware-clock' 



Ido Schimmel says:

====================
mlxsw: Add support for physical hardware clock

Shalom says:

This patchset adds support for physical hardware clock for Spectrum-1
ASIC only.

Patches #1, #2 and #3 add the ability to query the free running clock
PCI address.

Patches #4 and #5 add two new register, the Management UTC Register and
the Management Pulse Per Second Register.

Patch #6 publishes scaled_ppm_to_ppb() to allow drivers to use it.

Patch #7 adds the physical hardware clock operations.

Patch #8 initializes the physical hardware clock.

Patch #9 adds a selftest for testing the PTP physical hardware clock.

v2 (Richard):
* s/ptp_clock_scaled_ppm_to_ppb/scaled_ppm_to_ppb/
* imply PTP_1588_CLOCK in mlxsw Kconfig
* s/mlxsw_sp1_ptp_update_phc_settime/mlxsw_sp1_ptp_phc_settime/
* s/mlxsw_sp1_ptp_update_phc_adjfreq/mlxsw_sp1_ptp_phc_adjfreq/
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 514fcaac 9366211f

drivers/net/ethernet/mellanox/mlxsw/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -83,6 +83,7 @@ config MLXSW_SPECTRUM 
	select PARMAN

	select OBJAGG

	select MLXFW

	imply PTP_1588_CLOCK

	default m

	---help---

	  This driver supports Mellanox Technologies Spectrum Ethernet

drivers/net/ethernet/mellanox/mlxsw/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -31,5 +31,6 @@ mlxsw_spectrum-objs := spectrum.o spectrum_buffers.o \ 
				   spectrum_nve.o spectrum_nve_vxlan.o \

				   spectrum_dpipe.o

mlxsw_spectrum-$(CONFIG_MLXSW_SPECTRUM_DCB)	+= spectrum_dcb.o

mlxsw_spectrum-$(CONFIG_PTP_1588_CLOCK)		+= spectrum_ptp.o

obj-$(CONFIG_MLXSW_MINIMAL)	+= mlxsw_minimal.o

mlxsw_minimal-objs		:= minimal.o

drivers/net/ethernet/mellanox/mlxsw/cmd.h

+12 −0
Original line number Diff line number Diff line
@@ -317,6 +317,18 @@ MLXSW_ITEM64(cmd_mbox, query_fw, doorbell_page_offset, 0x40, 0, 64); 
 */

MLXSW_ITEM32(cmd_mbox, query_fw, doorbell_page_bar, 0x48, 30, 2);



/* cmd_mbox_query_fw_free_running_clock_offset

 * The offset of the free running clock page

 */

MLXSW_ITEM64(cmd_mbox, query_fw, free_running_clock_offset, 0x50, 0, 64);



/* cmd_mbox_query_fw_fr_rn_clk_bar

 * PCI base address register (BAR) of the free running clock page

 * 0: BAR 0

 * 1: 64 bit BAR

 */

MLXSW_ITEM32(cmd_mbox, query_fw, fr_rn_clk_bar, 0x58, 30, 2);



/* QUERY_BOARDINFO - Query Board Information

 * -----------------------------------------

 * OpMod == 0 (N/A), INMmod == 0 (N/A)

drivers/net/ethernet/mellanox/mlxsw/core.c

+12 −0
Original line number Diff line number Diff line
@@ -2026,6 +2026,18 @@ int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 
}

EXPORT_SYMBOL(mlxsw_core_resources_query);



u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core)

{

	return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv);

}

EXPORT_SYMBOL(mlxsw_core_read_frc_h);



u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core)

{

	return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv);

}

EXPORT_SYMBOL(mlxsw_core_read_frc_l);



static int __init mlxsw_core_module_init(void)

{

	int err;

drivers/net/ethernet/mellanox/mlxsw/core.h

+7 −1
Original line number Diff line number Diff line
@@ -309,6 +309,9 @@ int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 
void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core);

void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core);



u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core);

u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core);



bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,

			  enum mlxsw_res_id res_id);
@@ -339,6 +342,8 @@ struct mlxsw_bus { 
			char *in_mbox, size_t in_mbox_size,

			char *out_mbox, size_t out_mbox_size,

			u8 *p_status);

	u32 (*read_frc_h)(void *bus_priv);

	u32 (*read_frc_l)(void *bus_priv);

	u8 features;

};
@@ -356,7 +361,8 @@ struct mlxsw_bus_info { 
	struct mlxsw_fw_rev fw_rev;

	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];

	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];

	u8 low_frequency;

	u8 low_frequency:1,

	   read_frc_capable:1;

};



struct mlxsw_hwmon;