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Commit 1123e3ad authored by Ingo Molnar's avatar Ingo Molnar
Browse files

perf_counter: Clean up x86 boot messages



Standardize and tidy up all the messages we print during
perfcounter initialization.

Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
LKML-Reference: <new-submission>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent ad689220
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+24 −22
Original line number Original line Diff line number Diff line
@@ -1301,6 +1301,8 @@ static int intel_pmu_init(void)
	x86_pmu				= intel_pmu;
	x86_pmu				= intel_pmu;
	x86_pmu.version			= version;
	x86_pmu.version			= version;
	x86_pmu.num_counters		= eax.split.num_counters;
	x86_pmu.num_counters		= eax.split.num_counters;
	x86_pmu.counter_bits		= eax.split.bit_width;
	x86_pmu.counter_mask		= (1ULL << eax.split.bit_width) - 1;


	/*
	/*
	 * Quirk: v2 perfmon does not report fixed-purpose counters, so
	 * Quirk: v2 perfmon does not report fixed-purpose counters, so
@@ -1308,13 +1310,10 @@ static int intel_pmu_init(void)
	 */
	 */
	x86_pmu.num_counters_fixed	= max((int)edx.split.num_counters_fixed, 3);
	x86_pmu.num_counters_fixed	= max((int)edx.split.num_counters_fixed, 3);


	x86_pmu.counter_bits = eax.split.bit_width;
	x86_pmu.counter_mask = (1ULL << eax.split.bit_width) - 1;

	rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
	rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);


	/*
	/*
	 * Nehalem:
	 * Install the hw-cache-events table:
	 */
	 */
	switch (boot_cpu_data.x86_model) {
	switch (boot_cpu_data.x86_model) {
	case 17:
	case 17:
@@ -1322,7 +1321,7 @@ static int intel_pmu_init(void)
		sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
		sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
			PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);
			PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);


		pr_info("... installed Core2 event tables\n");
		pr_cont("Core2 events, ");
		break;
		break;
	default:
	default:
	case 26:
	case 26:
@@ -1330,14 +1329,14 @@ static int intel_pmu_init(void)
		sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
		sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
			PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);
			PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);


		pr_info("... installed Nehalem/Corei7 event tables\n");
		pr_cont("Nehalem/Corei7 events, ");
		break;
		break;
	case 28:
	case 28:
		memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
		memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
		sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
		sizeof(u64)*PERF_COUNT_HW_CACHE_MAX*
			PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);
			PERF_COUNT_HW_CACHE_OP_MAX*PERF_COUNT_HW_CACHE_RESULT_MAX);


		pr_info("... installed Atom event tables\n");
		pr_cont("Atom events, ");
		break;
		break;
	}
	}
	return 0;
	return 0;
@@ -1353,6 +1352,8 @@ void __init init_hw_perf_counters(void)
{
{
	int err;
	int err;


	pr_info("Performance Counters: ");

	switch (boot_cpu_data.x86_vendor) {
	switch (boot_cpu_data.x86_vendor) {
	case X86_VENDOR_INTEL:
	case X86_VENDOR_INTEL:
		err = intel_pmu_init();
		err = intel_pmu_init();
@@ -1363,14 +1364,13 @@ void __init init_hw_perf_counters(void)
	default:
	default:
		return;
		return;
	}
	}
	if (err != 0)
	if (err != 0) {
		pr_cont("no PMU driver, software counters only.\n");
		return;
		return;
	}


	pr_info("%s Performance Monitoring support detected.\n", x86_pmu.name);
	pr_cont("%s PMU driver.\n", x86_pmu.name);
	pr_info("... version:         %d\n", x86_pmu.version);
	pr_info("... bit width:       %d\n", x86_pmu.counter_bits);


	pr_info("... num counters:    %d\n", x86_pmu.num_counters);
	if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
	if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
		x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
		x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
		WARN(1, KERN_ERR "hw perf counters %d > max(%d), clipping!",
		WARN(1, KERN_ERR "hw perf counters %d > max(%d), clipping!",
@@ -1379,23 +1379,25 @@ void __init init_hw_perf_counters(void)
	perf_counter_mask = (1 << x86_pmu.num_counters) - 1;
	perf_counter_mask = (1 << x86_pmu.num_counters) - 1;
	perf_max_counters = x86_pmu.num_counters;
	perf_max_counters = x86_pmu.num_counters;


	pr_info("... value mask:      %016Lx\n", x86_pmu.counter_mask);
	pr_info("... max period:      %016Lx\n", x86_pmu.max_period);

	if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
	if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
		x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED;
		x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED;
		WARN(1, KERN_ERR "hw perf counters fixed %d > max(%d), clipping!",
		WARN(1, KERN_ERR "hw perf counters fixed %d > max(%d), clipping!",
		     x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED);
		     x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED);
	}
	}
	pr_info("... fixed counters:  %d\n", x86_pmu.num_counters_fixed);


	perf_counter_mask |=
	perf_counter_mask |=
		((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED;
		((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED;


	pr_info("... counter mask:    %016Lx\n", perf_counter_mask);

	perf_counters_lapic_init();
	perf_counters_lapic_init();
	register_die_notifier(&perf_counter_nmi_notifier);
	register_die_notifier(&perf_counter_nmi_notifier);

	pr_info("... version:                 %d\n",     x86_pmu.version);
	pr_info("... bit width:               %d\n",     x86_pmu.counter_bits);
	pr_info("... generic counters:        %d\n",     x86_pmu.num_counters);
	pr_info("... value mask:              %016Lx\n", x86_pmu.counter_mask);
	pr_info("... max period:              %016Lx\n", x86_pmu.max_period);
	pr_info("... fixed-purpose counters:  %d\n",     x86_pmu.num_counters_fixed);
	pr_info("... counter mask:            %016Lx\n", perf_counter_mask);
}
}


static inline void x86_pmu_read(struct perf_counter *counter)
static inline void x86_pmu_read(struct perf_counter *counter)