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Commit 1058ecda authored by Yoichi Yuasa's avatar Yoichi Yuasa Committed by Ralf Baechle
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[MIPS] vr41xx: Changed workaround to recommended method 



Signed-off-by: default avatarYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 30f244ae

arch/mips/mm/c-r4k.c

+3 −4
Original line number Original line Diff line number Diff line
@@ -867,12 +867,13 @@ static void __init probe_pcache(void) 
		/* Workaround for cache instruction bug of VR4131 */

		/* Workaround for cache instruction bug of VR4131 */

		if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||

		if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||

		    c->processor_id == 0x0c82U) {

		    c->processor_id == 0x0c82U) {

			config &= ~0x00000030U;

			config |= 0x00400000U;

			config |= 0x00400000U;

			if (c->processor_id == 0x0c80U)

			if (c->processor_id == 0x0c80U)

				config |= VR41_CONF_BP;

				config |= VR41_CONF_BP;

			write_c0_config(config);

			write_c0_config(config);

		}

		} else

			c->options |= MIPS_CPU_CACHE_CDEX_P;



		icache_size = 1 << (10 + ((config & CONF_IC) >> 9));

		icache_size = 1 << (10 + ((config & CONF_IC) >> 9));

		c->icache.linesz = 16 << ((config & CONF_IB) >> 5);

		c->icache.linesz = 16 << ((config & CONF_IB) >> 5);

		c->icache.ways = 2;

		c->icache.ways = 2;
@@ -882,8 +883,6 @@ static void __init probe_pcache(void) 
		c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);

		c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);

		c->dcache.ways = 2;

		c->dcache.ways = 2;

		c->dcache.waybit = __ffs(dcache_size/2);

		c->dcache.waybit = __ffs(dcache_size/2);



		c->options |= MIPS_CPU_CACHE_CDEX_P;

		break;

		break;





	case CPU_VR41XX:

	case CPU_VR41XX: