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Unverified Commit 101e6fce authored by Maxime Ripard's avatar Maxime Ripard Committed by Mark Brown
Browse files

spi: sun6i: Add YAML schemas



Switch the DT binding to a YAML schema to enable the DT validation.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 3133f5c2
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A31 SPI Controller Device Tree Bindings

allOf:
  - $ref: "spi-controller.yaml"

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <maxime.ripard@bootlin.com>

properties:
  "#address-cells": true
  "#size-cells": true

  compatible:
    enum:
      - allwinner,sun6i-a31-spi
      - allwinner,sun8i-h3-spi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Bus Clock
      - description: Module Clock

  clock-names:
    items:
      - const: ahb
      - const: mod

  resets:
    maxItems: 1

  dmas:
    items:
      - description: RX DMA Channel
      - description: TX DMA Channel

  dma-names:
    items:
      - const: rx
      - const: tx

  num-cs: true

patternProperties:
  "^.*@[0-9a-f]+":
    properties:
      reg:
        items:
          minimum: 0
          maximum: 4

      spi-rx-bus-width:
        const: 1

      spi-tx-bus-width:
        const: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    spi1: spi@1c69000 {
        compatible = "allwinner,sun6i-a31-spi";
        reg = <0x01c69000 0x1000>;
        interrupts = <0 66 4>;
        clocks = <&ahb1_gates 21>, <&spi1_clk>;
        clock-names = "ahb", "mod";
        resets = <&ahb1_rst 21>;
        #address-cells = <1>;
        #size-cells = <0>;
    };

  - |
    spi0: spi@1c68000 {
        compatible = "allwinner,sun8i-h3-spi";
        reg = <0x01c68000 0x1000>;
        interrupts = <0 65 4>;
        clocks = <&ccu 30>, <&ccu 82>;
        clock-names = "ahb", "mod";
        dmas = <&dma 23>, <&dma 23>;
        dma-names = "rx", "tx";
        resets = <&ccu 15>;
        #address-cells = <1>;
        #size-cells = <0>;
    };

...
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Allwinner A31/H3 SPI controller

Required properties:
- compatible: Should be "allwinner,sun6i-a31-spi" or "allwinner,sun8i-h3-spi".
- reg: Should contain register location and length.
- interrupts: Should contain interrupt.
- clocks: phandle to the clocks feeding the SPI controller. Two are
          needed:
  - "ahb": the gated AHB parent clock
  - "mod": the parent module clock
- clock-names: Must contain the clock names described just above
- resets: phandle to the reset controller asserting this device in
          reset

Optional properties:
- dmas: DMA specifiers for rx and tx dma. See the DMA client binding,
	Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "rx" and "tx" if present.

Example:

spi1: spi@1c69000 {
	compatible = "allwinner,sun6i-a31-spi";
	reg = <0x01c69000 0x1000>;
	interrupts = <0 66 4>;
	clocks = <&ahb1_gates 21>, <&spi1_clk>;
	clock-names = "ahb", "mod";
	resets = <&ahb1_rst 21>;
};

spi0: spi@1c68000 {
	compatible = "allwinner,sun8i-h3-spi";
	reg = <0x01c68000 0x1000>;
	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
	clock-names = "ahb", "mod";
	dmas = <&dma 23>, <&dma 23>;
	dma-names = "rx", "tx";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	resets = <&ccu RST_BUS_SPI0>;
	#address-cells = <1>;
	#size-cells = <0>;
};