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Commit 10182e77 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/vlv: drop unused vlv_gps_core_read/write functions 



Not needed.

Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/532150999335216b1374c606e1b3c253a6c9fe9d.1454582914.git.jani.nikula@intel.com
parent 4688d45f

drivers/gpu/drm/i915/i915_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -3479,8 +3479,6 @@ u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg); 
void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

u32 vlv_bunit_read(struct drm_i915_private *dev_priv, u32 reg);

void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg);

void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);

u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);

void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);

u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,

drivers/gpu/drm/i915/i915_reg.h

+0 −1
Original line number Diff line number Diff line
@@ -618,7 +618,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) 
#define   IOSF_PORT_CCK				0x14

#define   IOSF_PORT_DPIO_2			0x1a

#define   IOSF_PORT_FLISDSI			0x1b

#define   IOSF_PORT_GPS_CORE			0x48

#define   IOSF_PORT_CCU				0xa9

#define VLV_IOSF_DATA				_MMIO(VLV_DISPLAY_BASE + 0x2104)

#define VLV_IOSF_ADDR				_MMIO(VLV_DISPLAY_BASE + 0x2108)

drivers/gpu/drm/i915/intel_sideband.c

+0 −14
Original line number Diff line number Diff line
@@ -171,20 +171,6 @@ void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val) 
			SB_CRWRDA_NP, reg, &val);

}



u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg)

{

	u32 val = 0;

	vlv_sideband_rw(dev_priv, PCI_DEVFN(0, 0), IOSF_PORT_GPS_CORE,

			SB_CRRDDA_NP, reg, &val);

	return val;

}



void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)

{

	vlv_sideband_rw(dev_priv, PCI_DEVFN(0, 0), IOSF_PORT_GPS_CORE,

			SB_CRWRDA_NP, reg, &val);

}



u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg)

{

	u32 val = 0;