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Commit 0fe9c5d9 authored by Harshitha Sai Neelati's avatar Harshitha Sai Neelati
Browse files

ARM: dts: msm: Update GPU Fmax to 676MHz for Shima default and AC SKU 

Update the GPU Fmax to 676MHz for Shima default SKU and AC SKU
as recommended.

Change-Id: Ib506e468b582f4e7f0aa90944b0a999101795c60
parent c570ec4f

qcom/shima-gpu.dtsi

+43 −29
Original line number Diff line number Diff line
@@ -135,12 +135,12 @@ 
				#size-cells = <0>;



				qcom,speed-bin = <0>;

				qcom,initial-pwrlevel = <2>;

				qcom,initial-pwrlevel = <4>;



				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <490000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

					qcom,gpu-freq = <676000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;



					qcom,bus-freq-ddr7 = <11>;

					qcom,bus-min-ddr7 = <10>;
@@ -153,6 +153,34 @@ 


				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <608000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;



					qcom,bus-freq-ddr7 = <10>;

					qcom,bus-min-ddr7 = <9>;

					qcom,bus-max-ddr7 = <11>;



					qcom,bus-freq-ddr8 = <9>;

					qcom,bus-min-ddr8 = <8>;

					qcom,bus-max-ddr8 = <11>;

				};



				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <540000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;



					qcom,bus-freq-ddr7 = <9>;

					qcom,bus-min-ddr7 = <8>;

					qcom,bus-max-ddr7 = <11>;



					qcom,bus-freq-ddr8 = <8>;

					qcom,bus-min-ddr8 = <7>;

					qcom,bus-max-ddr8 = <10>;

				};



				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <443000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@@ -165,8 +193,8 @@ 
					qcom,bus-max-ddr8 = <9>;

				};



				qcom,gpu-pwrlevel@2 {

					reg = <2>;

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <285000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
@@ -271,24 +299,10 @@ 
				#size-cells = <0>;



				qcom,speed-bin = <158>;

				qcom,initial-pwrlevel = <5>;

				qcom,initial-pwrlevel = <4>;



				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <747000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;



					qcom,bus-freq-ddr7 = <11>;

					qcom,bus-min-ddr7 = <11>;

					qcom,bus-max-ddr7 = <11>;



					qcom,bus-freq-ddr8 = <11>;

					qcom,bus-min-ddr8 = <10>;

					qcom,bus-max-ddr8 = <11>;

				};



				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <676000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
@@ -296,13 +310,13 @@ 
					qcom,bus-min-ddr7 = <10>;

					qcom,bus-max-ddr7 = <11>;



					qcom,bus-freq-ddr8 = <10>;

					qcom,bus-freq-ddr8 = <11>;

					qcom,bus-min-ddr8 = <9>;

					qcom,bus-max-ddr8 = <11>;

				};



				qcom,gpu-pwrlevel@2 {

					reg = <2>;

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <608000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
@@ -315,8 +329,8 @@ 
					qcom,bus-max-ddr8 = <11>;

				};



				qcom,gpu-pwrlevel@3 {

					reg = <3>;

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <540000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
@@ -329,8 +343,8 @@ 
					qcom,bus-max-ddr8 = <10>;

				};



				qcom,gpu-pwrlevel@4 {

					reg = <4>;

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <443000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@@ -343,8 +357,8 @@ 
					qcom,bus-max-ddr8 = <9>;

				};



				qcom,gpu-pwrlevel@5 {

					reg = <5>;

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <285000000>;

					qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;