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Commit 0f7ba9fc authored by Can Guo's avatar Can Guo
Browse files

BACKPORT: FROMGIT: scsi: ufs: Add dev ref clock gating wait time support 

In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime defines
the minimum time for which the reference clock is required by device during
transition to LS-MODE or HIBERN8 state. Make this change to reflect the new
requirement by adding delays before turning off the clock.

Link: https://lore.kernel.org/r/1581392451-28743-7-git-send-email-cang@codeaurora.org


Reviewed-by: default avatarAsutosh Das <asutoshd@codeaurora.org>
Reviewed-by: default avatarBean Huo <beanhuo@micron.com>
Reviewed-by: default avatarStanley Chu <stanley.chu@mediatek.com>
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>

Bug: 150892981
Change-Id: I33b3c50ae0854621364bb3785c96e951dc7031ef
(cherry picked from commit 09f17791e640dcb8b29cc0b3279e73f48985c2be
https://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git

 5.7/scsi-queue)
[can: Resolved minor conflict in drivers/scsi/ufs/ufshcd.c]
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
parent 243498bb

drivers/scsi/ufs/ufs.h

+3 −0
Original line number Diff line number Diff line
@@ -168,6 +168,7 @@ enum attr_idn { 
	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,

	QUERY_ATTR_IDN_PSA_STATE		= 0x15,

	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,

	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,

};



/* Descriptor idn for Query requests */
@@ -533,6 +534,8 @@ struct ufs_dev_info { 
	u16 wmanufacturerid;

	/*UFS device Product Name */

	u8 *model;

	u16 wspecversion;

	u32 clk_gating_wait_us;

};



/**

drivers/scsi/ufs/ufshcd.c

+34 −0
Original line number Diff line number Diff line
@@ -92,6 +92,9 @@ 
/* default delay of autosuspend: 2000 ms */

#define RPM_AUTOSUSPEND_DELAY_MS 2000



/* Default value of wait time before gating device ref clock */

#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */



#define ufshcd_toggle_vreg(_dev, _vreg, _on)				\

	({                                                              \

		int _ret;                                               \
@@ -3413,6 +3416,31 @@ static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba, 
				      param_offset, param_read_buf, param_size);

}



static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)

{

	int err = 0;

	u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;



	if (hba->dev_info.wspecversion >= 0x300) {

		err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,

				QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,

				&gating_wait);

		if (err)

			dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",

					 err, gating_wait);



		if (gating_wait == 0) {

			gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;

			dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",

					 gating_wait);

		}



		hba->dev_info.clk_gating_wait_us = gating_wait;

	}



	return err;

}



/**

 * ufshcd_memory_alloc - allocate memory for host memory space data structures

 * @hba: per adapter instance
@@ -6672,6 +6700,10 @@ static int ufs_get_device_desc(struct ufs_hba *hba) 
	dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |

				     desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];



	/* getting Specification Version in big endian format */

	dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |

				      desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];



	model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];

	err = ufshcd_read_string_desc(hba, model_index,

				      &dev_info->model, SD_ASCII_STD);
@@ -7037,6 +7069,8 @@ static int ufshcd_probe_hba(struct ufs_hba *hba) 
		goto out;

	}



	ufshcd_get_ref_clk_gating_wait(hba);



	ufs_fixup_device_setup(hba);

	ufshcd_tune_unipro_params(hba);