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Commit 0f0e9431 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable btfm for shima"

parents d7158e1c e4a51ec4

qcom/shima-audio-overlay.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -244,7 +244,9 @@ 
&shima_snd {

	qcom,model = "lahaina-shimaidp-snd-card";

	qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>;

	qcom,wcn-btfm = <0>;

	qcom,wcn-bt = <1>;

	qcom,tdm-max-slots = <8>;

	qcom,wcd-disabled = <0>;

	qcom,ext-disp-audio-rx = <0>;

	qcom,audio-routing =

		"AMIC1", "Analog Mic1",

qcom/shima-audio.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -152,7 +152,7 @@ 
&q6core {

	shima_snd: sound {

		compatible = "qcom,lahaina-asoc-snd";

		qcom,mi2s-audio-intf = <0>;

		qcom,mi2s-audio-intf = <1>;

		qcom,auxpcm-audio-intf = <1>;

		qcom,wcn-bt = <0>;

		qcom,ext-disp-audio-rx = <0>;

qcom/shima-idp.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -183,4 +183,13 @@ 
	};

};



&dai_mi2s2 {

	qcom,msm-mi2s-tx-lines = <1>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active

			&tert_mi2s_sd0_active>;

	pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep

			&tert_mi2s_sd0_sleep>;

};



#include "camera/shima-camera-sensor-idp.dtsi"

qcom/shima-idps-digital-mics.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -6,7 +6,9 @@ 
&shima_snd {

	qcom,model = "lahaina-shimaidps-snd-card";

	qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>;

	qcom,wcn-btfm = <0>;

	qcom,wcn-bt = <1>;

	qcom,tdm-max-slots = <8>;

	qcom,wcd-disabled = <0>;

	qcom,ext-disp-audio-rx = <0>;

	qcom,audio-routing =

		"AMIC1", "Analog Mic1",

qcom/shima-qrd.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -282,3 +282,12 @@ 
	qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>,

				  <&bolero>;

};



&dai_mi2s2 {

	qcom,msm-mi2s-tx-lines = <1>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active

			&tert_mi2s_sd0_active>;

	pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep

			&tert_mi2s_sd0_sleep>;

};