Commit 0ee198ab authored May 17, 2019 by Manivannan Sadhasivam Committed by Heiko Stuebner May 20, 2019

arm64: dts: rockchip: Enable SPI1 on Ficus



Enable SPI1 exposed on both Low and High speed expansion connectors
of Ficus. SPI1 has 3 different chip selects wired as below:

CS0 - Serial Flash (unpopulated)
CS1 - Low Speed expansion
CS2 - High Speed expansion

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

parent 7b305b0f

arch/arm64/boot/dts/rockchip/rk3399-ficus.dts

+6 −0

Original line number	Diff line number	Diff line
		@@ -146,6 +146,12 @@
		};
		};

		&spi1 {
		/* On both Low speed and High speed expansion */
		cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
		status = "okay";
		};

		&usbdrd_dwc3_0 {
		dr_mode = "host";
		};