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Commit 0e1a4200 authored by Shravan Nevatia's avatar Shravan Nevatia
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ARM: dts: msm: Update cphy_rx_clk_src LOWSVS corner for shima

- Update the cphy_rx_clk LOWSVS corner values (from 320MHz
to 266.67MHz) in the CSIPHY DT nodes for shima.

- Zero out the rx_clk values in the CSID nodes to ensure
the clk is only set by PHY.

CRs-Fixed: 2792275
Change-Id: Ic39c0123bb04b5b7e449f95823303ca026fa81be
parent 9ea62611
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