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Commit 0e01491d authored by Florian Fainelli's avatar Florian Fainelli Committed by David S. Miller
Browse files

net: dsa: b53: Add SerDes support 



Add support for the Northstar Plus SerDes which is accessed through a
special page of the switch. Since this is something that most people
probably will not want to use, make it a configurable option with a
default on ARCH_BCM_NSP where it is the most useful currently.

The SerDes supports both SGMII and 1000baseX modes for both lanes, and
2500baseX for one of the lanes, and is internally looking like a
seemingly standard MII PHY, except for the few bits that got repurposed.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a8e8b985

drivers/net/dsa/b53/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -35,3 +35,10 @@ config B53_SRAB_DRIVER 
	help

	  Select to enable support for memory-mapped Switch Register Access

	  Bridge Registers (SRAB) like it is found on the BCM53010



config B53_SERDES

	tristate "B53 SerDes support"

	depends on B53

	default ARCH_BCM_NSP

	help

	  Select to enable support for SerDes on e.g: Northstar Plus SoCs.

drivers/net/dsa/b53/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -5,3 +5,4 @@ obj-$(CONFIG_B53_SPI_DRIVER) += b53_spi.o 
obj-$(CONFIG_B53_MDIO_DRIVER)	+= b53_mdio.o

obj-$(CONFIG_B53_MMAP_DRIVER)	+= b53_mmap.o

obj-$(CONFIG_B53_SRAB_DRIVER)	+= b53_srab.o

obj-$(CONFIG_B53_SERDES)	+= b53_serdes.o

drivers/net/dsa/b53/b53_common.c

+26 −0
Original line number Diff line number Diff line
@@ -765,6 +765,8 @@ static int b53_reset_switch(struct b53_device *priv) 
	memset(priv->vlans, 0, sizeof(*priv->vlans) * priv->num_vlans);

	memset(priv->ports, 0, sizeof(*priv->ports) * priv->num_ports);



	priv->serdes_lane = B53_INVALID_LANE;



	return b53_switch_reset(priv);

}
@@ -1128,6 +1130,9 @@ void b53_phylink_validate(struct dsa_switch *ds, int port, 
	struct b53_device *dev = ds->priv;

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };



	if (dev->ops->serdes_phylink_validate)

		dev->ops->serdes_phylink_validate(dev, port, mask, state);



	/* Allow all the expected bits */

	phylink_set(mask, Autoneg);

	phylink_set_port_modes(mask);
@@ -1164,8 +1169,13 @@ EXPORT_SYMBOL(b53_phylink_validate); 
int b53_phylink_mac_link_state(struct dsa_switch *ds, int port,

			       struct phylink_link_state *state)

{

	struct b53_device *dev = ds->priv;

	int ret = -EOPNOTSUPP;



	if (phy_interface_mode_is_8023z(state->interface) &&

	    dev->ops->serdes_link_state)

		ret = dev->ops->serdes_link_state(dev, port, state);



	return ret;

}

EXPORT_SYMBOL(b53_phylink_mac_link_state);
@@ -1184,11 +1194,19 @@ void b53_phylink_mac_config(struct dsa_switch *ds, int port, 
				      state->duplex, state->pause);

		return;

	}



	if (phy_interface_mode_is_8023z(state->interface) &&

	    dev->ops->serdes_config)

		dev->ops->serdes_config(dev, port, mode, state);

}

EXPORT_SYMBOL(b53_phylink_mac_config);



void b53_phylink_mac_an_restart(struct dsa_switch *ds, int port)

{

	struct b53_device *dev = ds->priv;



	if (dev->ops->serdes_an_restart)

		dev->ops->serdes_an_restart(dev, port);

}

EXPORT_SYMBOL(b53_phylink_mac_an_restart);
@@ -1205,6 +1223,10 @@ void b53_phylink_mac_link_down(struct dsa_switch *ds, int port, 
		b53_force_link(dev, port, false);

		return;

	}



	if (phy_interface_mode_is_8023z(interface) &&

	    dev->ops->serdes_link_set)

		dev->ops->serdes_link_set(dev, port, mode, interface, false);

}

EXPORT_SYMBOL(b53_phylink_mac_link_down);
@@ -1222,6 +1244,10 @@ void b53_phylink_mac_link_up(struct dsa_switch *ds, int port, 
		b53_force_link(dev, port, true);

		return;

	}



	if (phy_interface_mode_is_8023z(interface) &&

	    dev->ops->serdes_link_set)

		dev->ops->serdes_link_set(dev, port, mode, interface, true);

}

EXPORT_SYMBOL(b53_phylink_mac_link_up);

drivers/net/dsa/b53/b53_priv.h

+17 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 


struct b53_device;

struct net_device;

struct phylink_link_state;



struct b53_io_ops {

	int (*read8)(struct b53_device *dev, u8 page, u8 reg, u8 *value);
@@ -45,8 +46,23 @@ struct b53_io_ops { 
	int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value);

	int (*irq_enable)(struct b53_device *dev, int port);

	void (*irq_disable)(struct b53_device *dev, int port);

	u8 (*serdes_map_lane)(struct b53_device *dev, int port);

	int (*serdes_link_state)(struct b53_device *dev, int port,

				 struct phylink_link_state *state);

	void (*serdes_config)(struct b53_device *dev, int port,

			      unsigned int mode,

			      const struct phylink_link_state *state);

	void (*serdes_an_restart)(struct b53_device *dev, int port);

	void (*serdes_link_set)(struct b53_device *dev, int port,

				unsigned int mode, phy_interface_t interface,

				bool link_up);

	void (*serdes_phylink_validate)(struct b53_device *dev, int port,

					unsigned long *supported,

					struct phylink_link_state *state);

};



#define B53_INVALID_LANE	0xff



enum {

	BCM5325_DEVICE_ID = 0x25,

	BCM5365_DEVICE_ID = 0x65,
@@ -109,6 +125,7 @@ struct b53_device { 
	/* connect specific data */

	u8 current_page;

	struct device *dev;

	u8 serdes_lane;



	/* Master MDIO bus we got probed from */

	struct mii_bus *bus;

drivers/net/dsa/b53/b53_serdes.c

0 → 100644
+217 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause

/*

 * Northstar Plus switch SerDes/SGMII PHY main logic

 *

 * Copyright (C) 2018 Florian Fainelli <f.fainelli@gmail.com>

 */



#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt



#include <linux/delay.h>

#include <linux/kernel.h>

#include <linux/phy.h>

#include <linux/phylink.h>

#include <net/dsa.h>



#include "b53_priv.h"

#include "b53_serdes.h"

#include "b53_regs.h"



static void b53_serdes_write_blk(struct b53_device *dev, u8 offset, u16 block,

				 u16 value)

{

	b53_write16(dev, B53_SERDES_PAGE, B53_SERDES_BLKADDR, block);

	b53_write16(dev, B53_SERDES_PAGE, offset, value);

}



static u16 b53_serdes_read_blk(struct b53_device *dev, u8 offset, u16 block)

{

	u16 value;



	b53_write16(dev, B53_SERDES_PAGE, B53_SERDES_BLKADDR, block);

	b53_read16(dev, B53_SERDES_PAGE, offset, &value);



	return value;

}



static void b53_serdes_set_lane(struct b53_device *dev, u8 lane)

{

	if (dev->serdes_lane == lane)

		return;



	WARN_ON(lane > 1);



	b53_serdes_write_blk(dev, B53_SERDES_LANE,

			     SERDES_XGXSBLK0_BLOCKADDRESS, lane);

	dev->serdes_lane = lane;

}



static void b53_serdes_write(struct b53_device *dev, u8 lane,

			     u8 offset, u16 block, u16 value)

{

	b53_serdes_set_lane(dev, lane);

	b53_serdes_write_blk(dev, offset, block, value);

}



static u16 b53_serdes_read(struct b53_device *dev, u8 lane,

			   u8 offset, u16 block)

{

	b53_serdes_set_lane(dev, lane);

	return b53_serdes_read_blk(dev, offset, block);

}



void b53_serdes_config(struct b53_device *dev, int port, unsigned int mode,

		       const struct phylink_link_state *state)

{

	u8 lane = b53_serdes_map_lane(dev, port);

	u16 reg;



	if (lane == B53_INVALID_LANE)

		return;



	reg = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),

			      SERDES_DIGITAL_BLK);

	if (state->interface == PHY_INTERFACE_MODE_1000BASEX)

		reg |= FIBER_MODE_1000X;

	else

		reg &= ~FIBER_MODE_1000X;

	b53_serdes_write(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),

			 SERDES_DIGITAL_BLK, reg);

}

EXPORT_SYMBOL(b53_serdes_config);



void b53_serdes_an_restart(struct b53_device *dev, int port)

{

	u8 lane = b53_serdes_map_lane(dev, port);

	u16 reg;



	if (lane == B53_INVALID_LANE)

		return;



	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),

			      SERDES_MII_BLK);

	reg |= BMCR_ANRESTART;

	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),

			 SERDES_MII_BLK, reg);

}

EXPORT_SYMBOL(b53_serdes_an_restart);



int b53_serdes_link_state(struct b53_device *dev, int port,

			  struct phylink_link_state *state)

{

	u8 lane = b53_serdes_map_lane(dev, port);

	u16 dig, bmcr, bmsr;



	if (lane == B53_INVALID_LANE)

		return 1;



	dig = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_STATUS,

			      SERDES_DIGITAL_BLK);

	bmcr = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),

			       SERDES_MII_BLK);

	bmsr = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMSR),

			       SERDES_MII_BLK);



	switch ((dig >> SPEED_STATUS_SHIFT) & SPEED_STATUS_MASK) {

	case SPEED_STATUS_10:

		state->speed = SPEED_10;

		break;

	case SPEED_STATUS_100:

		state->speed = SPEED_100;

		break;

	case SPEED_STATUS_1000:

		state->speed = SPEED_1000;

		break;

	default:

	case SPEED_STATUS_2500:

		state->speed = SPEED_2500;

		break;

	}



	state->duplex = dig & DUPLEX_STATUS ? DUPLEX_FULL : DUPLEX_HALF;

	state->an_enabled = !!(bmcr & BMCR_ANENABLE);

	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);

	state->link = !!(dig & LINK_STATUS);

	if (dig & PAUSE_RESOLUTION_RX_SIDE)

		state->pause |= MLO_PAUSE_RX;

	if (dig & PAUSE_RESOLUTION_TX_SIDE)

		state->pause |= MLO_PAUSE_TX;



	return 0;

}

EXPORT_SYMBOL(b53_serdes_link_state);



void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,

			 phy_interface_t interface, bool link_up)

{

	u8 lane = b53_serdes_map_lane(dev, port);

	u16 reg;



	if (lane == B53_INVALID_LANE)

		return;



	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),

			      SERDES_MII_BLK);

	if (link_up)

		reg &= ~BMCR_PDOWN;

	else

		reg |= BMCR_PDOWN;

	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),

			 SERDES_MII_BLK, reg);

}

EXPORT_SYMBOL(b53_serdes_link_set);



void b53_serdes_phylink_validate(struct b53_device *dev, int port,

				 unsigned long *supported,

				 struct phylink_link_state *state)

{

	u8 lane = b53_serdes_map_lane(dev, port);



	if (lane == B53_INVALID_LANE)

		return;



	switch (lane) {

	case 0:

		phylink_set(supported, 2500baseX_Full);

		/* fallthrough */

	case 1:

		phylink_set(supported, 1000baseX_Full);

		break;

	default:

		break;

	}

}

EXPORT_SYMBOL(b53_serdes_phylink_validate);



int b53_serdes_init(struct b53_device *dev, int port)

{

	u8 lane = b53_serdes_map_lane(dev, port);

	u16 id0, msb, lsb;



	if (lane == B53_INVALID_LANE)

		return -EINVAL;



	id0 = b53_serdes_read(dev, lane, B53_SERDES_ID0, SERDES_ID0);

	msb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID1),

			      SERDES_MII_BLK);

	lsb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID2),

			      SERDES_MII_BLK);

	if (id0 == 0 || id0 == 0xffff) {

		dev_err(dev->dev, "SerDes not initialized, check settings\n");

		return -ENODEV;

	}



	dev_info(dev->dev,

		 "SerDes lane %d, model: %d, rev %c%d (OUI: 0x%08x)\n",

		 lane, id0 & SERDES_ID0_MODEL_MASK,

		 (id0 >> SERDES_ID0_REV_LETTER_SHIFT) + 0x41,

		 (id0 >> SERDES_ID0_REV_NUM_SHIFT) & SERDES_ID0_REV_NUM_MASK,

		 (u32)msb << 16 | lsb);



	return 0;

}

EXPORT_SYMBOL(b53_serdes_init);



MODULE_AUTHOR("Florian Fainelli <f.fainelli@gmail.com>");

MODULE_DESCRIPTION("B53 Switch SerDes driver");

MODULE_LICENSE("Dual BSD/GPL");