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Commit 0ca570d4 authored by Raghavendra Rao Ananta's avatar Raghavendra Rao Ananta
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ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina 

It is possible that the DDR bandwidth requirements are not
met during modem SSR. Hence, explicitly vote for DDR turbo
frequency during modem PIL.

Change-Id: I5134feaf593673beb8bbdafc416814a5d41fb47b
parent 4707b12c
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