Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0c89d4da authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-bindings-5.4' of... 

Merge tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings update for 5.4
 - Add SoC bindings for i.MX8MN.
 - Add board bindings for pico-pi-imx8m, Hummingboard Pulse, imx8mq
   nitrogen, i.MX8QXP AI_ML, ls1046a-frwy etc.
 - Add vendor prefix for Anvo-Systems and Einfochips.
 - Update LPUART bindings for i.MX8QXP clock requirement.
 - Update imx-weim bindings for optional burst clock mode support.
 - Update EEPROM bindings for Anvo ANV32E61W device support.

* tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: Add Kontron i.MX6UL N6310 compatibles
  dt-bindings: eeprom: at25: Add Anvo ANV32E61W
  dt-bindings: vendor-prefixes: Add Anvo-Systems
  dt-bindings: arm: fsl: add Hummingboard Pulse
  dt-bindings: arm: imx: add imx8mq nitrogen support
  dt-bindings: fsl: dspi: Add fsl,ls1088a-dspi compatible string
  dt-bindings: arm: imx: Add the soc binding for i.MX8MN
  dt-bindings: bus: imx-weim: document optional burst clock mode
  dt-bindings: arm: fsl: Add the pico-pi-imx8m board
  dt-bindings: arm: Document i.MX8QXP AI_ML board binding
  dt-bindings: Add Vendor prefix for Einfochips
  dt-bindings: arm: nxp: Add device tree binding for ls1046a-frwy board
  dt-bindings: serial: lpuart: add the clock requirement for imx8qxp
  dt-bindings: arm: fsl: Add support for ZII i.MX7 RMU2 board

Link: https://lore.kernel.org/r/20190825153237.28829-3-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 48dd4cf0 8d5fc0b9

Documentation/devicetree/bindings/arm/fsl.yaml

+26 −0
Original line number Diff line number Diff line
@@ -161,6 +161,20 @@ properties: 
        items:

          - enum:

              - fsl,imx6ul-14x14-evk      # i.MX6 UltraLite 14x14 EVK Board

              - kontron,imx6ul-n6310-som  # Kontron N6310 SOM

          - const: fsl,imx6ul



      - description: Kontron N6310 S Board

        items:

          - const: kontron,imx6ul-n6310-s

          - const: kontron,imx6ul-n6310-som

          - const: fsl,imx6ul



      - description: Kontron N6310 S 43 Board

        items:

          - const: kontron,imx6ul-n6310-s-43

          - const: kontron,imx6ul-n6310-s

          - const: kontron,imx6ul-n6310-som

          - const: fsl,imx6ul



      - description: i.MX6ULL based Boards
@@ -188,6 +202,7 @@ properties: 
              - fsl,imx7d-sdb             # i.MX7 SabreSD Board

              - novtech,imx7d-meerkat96   # i.MX7 Meerkat96 Board

              - tq,imx7d-mba7             # i.MX7D TQ MBa7 with TQMa7D SoM

              - zii,imx7d-rmu2            # ZII RMU2 Board

              - zii,imx7d-rpu2            # ZII RPU2 Board

          - const: fsl,imx7d
@@ -214,16 +229,26 @@ properties: 
              - fsl,imx8mm-evk            # i.MX8MM EVK Board

          - const: fsl,imx8mm



      - description: i.MX8MN based Boards

        items:

          - enum:

              - fsl,imx8mn-ddr4-evk       # i.MX8MN DDR4 EVK Board

          - const: fsl,imx8mn



      - description: i.MX8MQ based Boards

        items:

          - enum:

              - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board

              - fsl,imx8mq-evk            # i.MX8MQ EVK Board

              - purism,librem5-devkit     # Purism Librem5 devkit

              - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse

              - technexion,pico-pi-imx8m  # TechNexion PICO-PI-8M evk

          - const: fsl,imx8mq



      - description: i.MX8QXP based Boards

        items:

          - enum:

              - einfochips,imx8qxp-ai_ml  # i.MX8QXP AI_ML Board

              - fsl,imx8qxp-mek           # i.MX8QXP MEK Board

          - const: fsl,imx8qxp
@@ -283,6 +308,7 @@ properties: 
      - description: LS1046A based Boards

        items:

          - enum:

              - fsl,ls1046a-frwy

              - fsl,ls1046a-qds

              - fsl,ls1046a-rdb

          - const: fsl,ls1046a

Documentation/devicetree/bindings/bus/imx-weim.txt

+4 −0
Original line number Diff line number Diff line
@@ -44,6 +44,10 @@ Optional properties: 
			what bootloader sets up in IOMUXC_GPR1[11:0] will be

			used.



 - fsl,burst-clk-enable	For "fsl,imx50-weim" and "fsl,imx6q-weim" type of

			devices, the presence of this property indicates that

			the weim bus should operate in Burst Clock Mode.



Timing property for child nodes. It is mandatory, not optional.



 - fsl,weim-cs-timing:	The timing array, contains timing values for the

Documentation/devicetree/bindings/eeprom/at25.txt

+1 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ EEPROMs (SPI) compatible with Atmel at25. 
Required properties:

- compatible : Should be "<vendor>,<type>", and generic value "atmel,at25".

  Example "<vendor>,<type>" values:

    "anvo,anv32e61w"

    "microchip,25lc040"

    "st,m95m02"

    "st,m95256"

Documentation/devicetree/bindings/serial/fsl-lpuart.txt

+4 −1
Original line number Diff line number Diff line
@@ -13,7 +13,10 @@ Required properties: 
- reg : Address and length of the register set for the device

- interrupts : Should contain uart interrupt

- clocks : phandle + clock specifier pairs, one for each entry in clock-names

- clock-names : should contain: "ipg" - the uart clock

- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud

  clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access

  lpuart controller registers, it also requires "baud" clock for module to

  receive/transmit data.



Optional properties:

- dmas: A list of two dma specifiers, one for each entry in dma-names.

Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ Required properties: 
		or

		"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"

		"fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"

		"fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi"

- reg : Offset and length of the register set for the device

- interrupts : Should contain SPI controller interrupt

- clocks: from common clock binding: handle to dspi clock.