Loading bindings/clock/qcom,camcc.txt +5 −2 Original line number Diff line number Diff line Loading @@ -2,8 +2,11 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding ------------------------------------------------------------------- Required properties : - compatible : shall contain "qcom,sdm845-camcc" or "qcom,lahaina-camcc", "qcom,shima-camcc". - compatible : shall contain only one of the following: "qcom,sdm845-camcc" "qcom,lahaina-camcc" "qcom,lahaina-camcc-v2" "qcom,shima-camcc" - reg : shall contain base register location and length. - reg-names: names of registers listed in the same order as in the reg property. Loading qcom/lahaina-v2.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -121,4 +121,8 @@ 0x0244 0x03 0x0>; }; &clock_camcc { compatible = "qcom,lahaina-camcc-v2", "syscon"; }; #include "lahaina-v2-gpu.dtsi" Loading
bindings/clock/qcom,camcc.txt +5 −2 Original line number Diff line number Diff line Loading @@ -2,8 +2,11 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding ------------------------------------------------------------------- Required properties : - compatible : shall contain "qcom,sdm845-camcc" or "qcom,lahaina-camcc", "qcom,shima-camcc". - compatible : shall contain only one of the following: "qcom,sdm845-camcc" "qcom,lahaina-camcc" "qcom,lahaina-camcc-v2" "qcom,shima-camcc" - reg : shall contain base register location and length. - reg-names: names of registers listed in the same order as in the reg property. Loading
qcom/lahaina-v2.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -121,4 +121,8 @@ 0x0244 0x03 0x0>; }; &clock_camcc { compatible = "qcom,lahaina-camcc-v2", "syscon"; }; #include "lahaina-v2-gpu.dtsi"
