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Commit 0b8515ed authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue 



Jeff Kirsher says:

====================
100GbE Intel Wired LAN Driver Updates 2019-03-19

This series contains updates to ice driver only.

Michal adds support for the pruning enable flag to avoid seeing
broadcast packets on different VLANs.

Akeem fixes an issue with VF queues being disabled and the VF netdev
network carrier being lost after reset. Fixed an issue issue when doing
PFR and CORER resets, where all VF VSIs need to be reset and rebuilt
with the main VSIs before replaying all VSIs.  Resolved an issue to
properly initialize VFs in the guest OS via PCI passthrough.

Bruce adds a local variable to avoid unnecessary de-references
throughout ice_probe().

Brett cleans up the code a bit by removing the need for a local variable
and re-designs the loop to simply return when get a successful result.
Cleans up the code to replace loop calls with a predefined macro to make
the code more consistent.  Updated the driver to ensure ITR granularity
is always 2 usecs. Refactors the calculation of VSIs per PF into a
general function that can calculate per PF allocations for not just VSIs
but across multiple resource types.  Improve the driver performance of
the driver when using the default settings by determining the ring size
and the number of descriptors for transmit and receive based on a
calculation with the PAGE_SIZE, ICE_MAX_NUM_DESC, and
ICE_REQ_DESC_MULTIPLE.

Chinh fixes an issue, where a reserved bit was possibly being set when
it should never be set.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 8d3a3048 ad71b256

drivers/net/ethernet/intel/ice/ice.h

+14 −2
Original line number Diff line number Diff line
@@ -42,10 +42,21 @@ 


extern const char ice_drv_ver[];

#define ICE_BAR0		0

#define ICE_DFLT_NUM_DESC	128

#define ICE_REQ_DESC_MULTIPLE	32

#define ICE_MIN_NUM_DESC	ICE_REQ_DESC_MULTIPLE

#define ICE_MAX_NUM_DESC	8160

/* set default number of Rx/Tx descriptors to the minimum between

 * ICE_MAX_NUM_DESC and the number of descriptors to fill up an entire page

 */

#define ICE_DFLT_NUM_RX_DESC	min_t(u16, ICE_MAX_NUM_DESC, \

				      ALIGN(PAGE_SIZE / \

					    sizeof(union ice_32byte_rx_desc), \

					    ICE_REQ_DESC_MULTIPLE))

#define ICE_DFLT_NUM_TX_DESC	min_t(u16, ICE_MAX_NUM_DESC, \

				      ALIGN(PAGE_SIZE / \

					    sizeof(struct ice_tx_desc), \

					    ICE_REQ_DESC_MULTIPLE))



#define ICE_DFLT_TRAFFIC_CLASS	BIT(0)

#define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)

#define ICE_ETHTOOL_FWVER_LEN	32
@@ -257,7 +268,8 @@ struct ice_vsi { 
	u16 num_txq;			 /* Used Tx queues */

	u16 alloc_rxq;			 /* Allocated Rx queues */

	u16 num_rxq;			 /* Used Rx queues */

	u16 num_desc;

	u16 num_rx_desc;

	u16 num_tx_desc;

	struct ice_tc_cfg tc_cfg;

} ____cacheline_internodealigned_in_smp;

drivers/net/ethernet/intel/ice/ice_adminq_cmd.h

+3 −2
Original line number Diff line number Diff line
@@ -953,6 +953,7 @@ struct ice_aqc_set_phy_cfg_data { 
	__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */

	__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */

	u8 caps;

#define ICE_AQ_PHY_ENA_VALID_MASK	ICE_M(0xef, 0)

#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY	BIT(0)

#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY	BIT(1)

#define ICE_AQ_PHY_ENA_LOW_POWER	BIT(2)

drivers/net/ethernet/intel/ice/ice_common.c

+19 −5
Original line number Diff line number Diff line
@@ -1415,13 +1415,15 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res) 
}



/**

 * ice_get_guar_num_vsi - determine number of guar VSI for a PF

 * ice_get_num_per_func - determine number of resources per PF

 * @hw: pointer to the hw structure

 * @max: value to be evenly split between each PF

 *

 * Determine the number of valid functions by going through the bitmap returned

 * from parsing capabilities and use this to calculate the number of VSI per PF.

 * from parsing capabilities and use this to calculate the number of resources

 * per PF based on the max value passed in.

 */

static u32 ice_get_guar_num_vsi(struct ice_hw *hw)

static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)

{

	u8 funcs;
@@ -1432,7 +1434,7 @@ static u32 ice_get_guar_num_vsi(struct ice_hw *hw) 
	if (!funcs)

		return 0;



	return ICE_MAX_VSI / funcs;

	return max / funcs;

}



/**
@@ -1512,7 +1514,8 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count, 
					  "HW caps: Dev.VSI cnt = %d\n",

					  dev_p->num_vsi_allocd_to_host);

			} else if (func_p) {

				func_p->guar_num_vsi = ice_get_guar_num_vsi(hw);

				func_p->guar_num_vsi =

					ice_get_num_per_func(hw, ICE_MAX_VSI);

				ice_debug(hw, ICE_DBG_INIT,

					  "HW caps: Func.VSI cnt = %d\n",

					  number);
@@ -1929,6 +1932,15 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport, 
	if (!cfg)

		return ICE_ERR_PARAM;



	/* Ensure that only valid bits of cfg->caps can be turned on. */

	if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {

		ice_debug(hw, ICE_DBG_PHY,

			  "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",

			  cfg->caps);



		cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;

	}



	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);

	desc.params.set_phy.lport_num = lport;

	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
@@ -2027,8 +2039,10 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update) 
	/* clear the old pause settings */

	cfg.caps = pcaps->caps & ~(ICE_AQC_PHY_EN_TX_LINK_PAUSE |

				   ICE_AQC_PHY_EN_RX_LINK_PAUSE);



	/* set the new capabilities */

	cfg.caps |= pause_mask;



	/* If the capabilities have changed, then set the new config */

	if (cfg.caps != pcaps->caps) {

		int retry_count, retry_max = 10;

drivers/net/ethernet/intel/ice/ice_ethtool.c

+1 −2
Original line number Diff line number Diff line
@@ -1400,13 +1400,12 @@ ice_set_link_ksettings(struct net_device *netdev, 
		return -EOPNOTSUPP;



	/* Check if this is lan vsi */

	for (idx = 0 ; idx <  pf->num_alloc_vsi ; idx++) {

	ice_for_each_vsi(pf, idx)

		if (pf->vsi[idx]->type == ICE_VSI_PF) {

			if (np->vsi != pf->vsi[idx])

				return -EOPNOTSUPP;

			break;

		}

	}



	if (p->phy.media_type != ICE_MEDIA_BASET &&

	    p->phy.media_type != ICE_MEDIA_FIBER &&

drivers/net/ethernet/intel/ice/ice_hw_autogen.h

+10 −0
Original line number Diff line number Diff line
@@ -106,6 +106,16 @@ 
#define VPGEN_VFRTRIG_VFSWR_M			BIT(0)

#define PFHMC_ERRORDATA				0x00520500

#define PFHMC_ERRORINFO				0x00520400

#define GLINT_CTL				0x0016CC54

#define GLINT_CTL_DIS_AUTOMASK_M		BIT(0)

#define GLINT_CTL_ITR_GRAN_200_S		16

#define GLINT_CTL_ITR_GRAN_200_M		ICE_M(0xF, 16)

#define GLINT_CTL_ITR_GRAN_100_S		20

#define GLINT_CTL_ITR_GRAN_100_M		ICE_M(0xF, 20)

#define GLINT_CTL_ITR_GRAN_50_S			24

#define GLINT_CTL_ITR_GRAN_50_M			ICE_M(0xF, 24)

#define GLINT_CTL_ITR_GRAN_25_S			28

#define GLINT_CTL_ITR_GRAN_25_M			ICE_M(0xF, 28)

#define GLINT_DYN_CTL(_INT)			(0x00160000 + ((_INT) * 4))

#define GLINT_DYN_CTL_INTENA_M			BIT(0)

#define GLINT_DYN_CTL_CLEARPBA_M		BIT(1)