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Commit 0b51d993 authored by Kevin Wang's avatar Kevin Wang Committed by Alex Deucher
Browse files

drm/amd/powerplay: implement smu_alloc[free]_memory pool function 



This patch implements smu_alloc[free]_memory pool function to reserve the memory
pool bo.

Signed-off-by: default avatarKevin Wang <Kevin1.Wang@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 08115f87

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+54 −1
Original line number Diff line number Diff line
@@ -137,6 +137,8 @@ static int smu_sw_init(void *handle) 
	if (adev->asic_type < CHIP_VEGA20)

		return -EINVAL;



	smu->pool_size = adev->pm.smu_prv_buffer_size;



	ret = smu_init_microcode(smu);

	if (ret) {

		pr_err("Failed to load smu firmware!\n");
@@ -333,9 +335,56 @@ static int smu_smc_table_hw_init(struct smu_context *smu) 
 */

static int smu_alloc_memory_pool(struct smu_context *smu)

{

	return 0;

	struct amdgpu_device *adev = smu->adev;

	struct smu_table_context *smu_table = &smu->smu_table;

	struct smu_table *memory_pool = &smu_table->memory_pool;

	uint64_t pool_size = smu->pool_size;

	int ret = 0;



	if (pool_size == SMU_MEMORY_POOL_SIZE_ZERO)

		return ret;



	memory_pool->size = pool_size;

	memory_pool->align = PAGE_SIZE;

	memory_pool->domain = AMDGPU_GEM_DOMAIN_GTT;



	switch (pool_size) {

	case SMU_MEMORY_POOL_SIZE_256_MB:

	case SMU_MEMORY_POOL_SIZE_512_MB:

	case SMU_MEMORY_POOL_SIZE_1_GB:

	case SMU_MEMORY_POOL_SIZE_2_GB:

		ret = amdgpu_bo_create_kernel(adev,

					      memory_pool->size,

					      memory_pool->align,

					      memory_pool->domain,

					      &memory_pool->bo,

					      &memory_pool->mc_address,

					      &memory_pool->cpu_addr);

		break;

	default:

		break;

	}



	return ret;

}



static int smu_free_memory_pool(struct smu_context *smu)

{

	struct smu_table_context *smu_table = &smu->smu_table;

	struct smu_table *memory_pool = &smu_table->memory_pool;

	int ret = 0;



	if (memory_pool->size == SMU_MEMORY_POOL_SIZE_ZERO)

		return ret;



	amdgpu_bo_free_kernel(&memory_pool->bo,

			      &memory_pool->mc_address,

			      &memory_pool->cpu_addr);



	memset(memory_pool, 0, sizeof(struct smu_table));



	return ret;

}

static int smu_hw_init(void *handle)

{

	int ret;
@@ -399,6 +448,10 @@ static int smu_hw_fini(void *handle) 
	if (ret)

		return ret;



	ret = smu_free_memory_pool(smu);

	if (ret)

		return ret;



	return 0;

}

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+11 −0
Original line number Diff line number Diff line
@@ -24,6 +24,15 @@ 


#include "amdgpu.h"



enum smu_memory_pool_size

{

    SMU_MEMORY_POOL_SIZE_ZERO   = 0,

    SMU_MEMORY_POOL_SIZE_256_MB = 0x10000000,

    SMU_MEMORY_POOL_SIZE_512_MB = 0x20000000,

    SMU_MEMORY_POOL_SIZE_1_GB   = 0x40000000,

    SMU_MEMORY_POOL_SIZE_2_GB   = 0x80000000,

};



#define SMU_TABLE_INIT(tables, table_id, s, a, d)	\

	do {						\

		tables[table_id].size = s;		\
@@ -63,6 +72,7 @@ struct smu_table_context 
	struct smu_bios_boot_up_values	boot_values;

	struct smu_table		*tables;

	uint32_t			table_count;

	struct smu_table		memory_pool;

};



struct smu_dpm_context {
@@ -81,6 +91,7 @@ struct smu_context 


	const struct smu_funcs		*funcs;

	struct mutex			mutex;

	uint64_t pool_size;



	struct smu_table_context	smu_table;

	struct smu_dpm_context		smu_dpm;